[moved] Design of SAR ADC in Cadence

[Savankumar]

Hey Team,
I am designing a 4 bit SAR ADC using the charge redistribution method for the dac circuit. I am facing errors while doing transient simulation.

error: INFO (ADE-3069): Errors encountered during the simulation. For more information, see the log files
accessible from the Simulation -> Output Log menu.

When I checked the output Log menu, I found out two errors:

1) xrun/CUVHNF
2) ELBERR​

Does anyone face this kind of error?
Any kind of help will be appreciated.
Thank you

 

[frankrose]

Usually these error logs are more talkative...are you sure this is from the correct log file? And what is the context around these words?
Could you run transient simulation before? I suppose yes, so what change caused this error you did?
Do you have any special instance, verilogA module maybe? Models are correct?

 

[Savankumar]

My simulation was running and after simulation was done I was unable to plot my outputs so I checked the warnings and there I found out about that check output log for more details about the error.
I am just able to deal with this error. It was a problem with my AMS config. So I tried again and it got resolved.
I can attach the snapshot of it but I can't find any option here.
Sorry