[moved] CYPRESS FXLP & WVGA SENSOR in Snapshot Mode

[adityamflow]

Guide Me...
i am doing an self project on "cypress fx2lp & wvga sensor", in which i am working on "snapshot mode".
i have a code which is partial working, as people using fx2lp are less i am unable to debug my code to get desired output.

who ever in this forum having knowledge on Cypress fx2lp please guide me on my project.
thanks and regards
adityad

 

[ads-ee]

Re: CYPRESS FXLP & WVGA SENSOR in Snapshot Mode

The cypress FX2LP is NOT a PLD, SPLD, GAL, CPLD, or an FPGA. It is a USB controller/microcontroller. This post was started in the wrong section, so I'm moving it to the microcontroller section where it belongs.

If you want any chance of help, post your code (and use code/syntax tags).

- - - Updated - - -

You should make more of an effort to look for information...given that Cypress has a community forum with a subsection on their USB products, that is extremely easy to find...

 

[adityamflow]

Re: CYPRESS FXLP & WVGA SENSOR in Snapshot Mode

this is the code for the above operation

---

Code C - [expand]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
#pragma NOIV                    // Do not generate interrupt vectors
//-----------------------------------------------------------------------------
//   File:      slave.c
//   Contents:  Hooks required to implement USB peripheral function.
//              Code written for FX2 REVE 56-pin and above.
//              This firmware is used to demonstrate FX2 Slave FIF
//              operation.
//   Copyright (c) 2003 Cypress Semiconductor All rights reserved
//-----------------------------------------------------------------------------
#include "fx2.h"
#include "fx2regs.h"
#include "fx2sdly.h"            // SYNCDELAY macro
 
#define LED_ALL         (bmBIT0 | bmBIT1 | bmBIT2 | bmBIT3)
 
#define Data_control        0xb2
//#define no_data_control     0xb3
 
extern BOOL GotSUD;             // Received setup data flag
extern BOOL Sleep;
extern BOOL Rwuen;
extern BOOL Selfpwr;
 
BYTE i = 0;
BYTE check = 1;
BYTE Configuration;             // Current configuration
BYTE AlternateSetting;          // Alternate settings
//static WORD xdata LED_Count = 0;
//static BYTE xdata LED_Status = 0;
//BOOL done_frm_fpga = 0;
//BOOL frame_valid = 0; 
volatile BOOL vendor_com=0;    
volatile BOOL exposure_time=0;
//BOOL vendor_com1=0;
BYTE Image_Sensor = 0x5C; 
BYTE xdata REG01[3]={0x07,0x00,0x98};  //snap shot value
 
extern BOOL   interrupt_flag;
 
BYTE xdata REG02[3]={0x0B,0x0C,0x7B};  //Coarse shutter width(AEC disable)
// 3195 0C7B 100ms
// 500 1F4 default
//32765 7FFD max
BYTE xdata REG03[3]={0xAF,0x00,0x00};  //AEC disable/enable
BYTE xdata REG04[3]={0x03,0x00,0x02};  //Window height
BYTE xdata REG05[3]={0x04,0x00,0x02};  //window width
BYTE xdata REG06[3]={0x05,0x02,0x58}; //horizontal blanking
BYTE xdata REG07[3]={0x06,0x0F,0xA0}; //vertical blanking
//0FA0->100MSEC 
BYTE xdata REG08[3]={0x0D,0x00,0x02}; //no binning
BYTE xdata REG09[3]={0xAD,0x0C,0x7B};  //Coarse shutter width(AEC enable)
BYTE xdata REG010[3]={0xD5,0x06,0xEE};  //fine shutter width(AEC disable)
BYTE xdata REG011[3]={0xAC,0x06,0xEE};  //fine shutter width(AEC enable)
BYTE xdata REG012[3]={0x02,0x02,0xC4}; //reserved
BYTE xdata REG013[3]={0x47,0x00,0x81}; //A.black level correction
BYTE xdata REG014[3]={0x72,0x00,0x10}; //invert line valid
 
/*
//example in the technical note
BYTE xdata REG02[3]={0x0B,0x00,0xC8};
BYTE xdata REG03[3]={0xAF,0x00,0x00};  //AEC disable/enable
BYTE xdata REG04[3]={0x03,0x01,0xC2};  //Window height
BYTE xdata REG05[3]={0x04,0x02,0xDA};  //window width
BYTE xdata REG06[3]={0x05,0x00,0x57}; //horizontal blanking
BYTE xdata REG07[3]={0x06,0x00,0x14}; //vertical blanking
BYTE xdata REG08[3]={0x0D,0x00,0x02}; //no binning
BYTE xdata REG09[3]={0xAD,0x00,0xC8};  //Coarse shutter width(AEC enable)
 
*/
 
 
 
 
//BYTE xdata REG014[3]={0x0D,0x03,0x04}; 
 
/*#define VR_UPLOAD     0xa2    // wIDXL: 0-EEPROM, 1-RAM
#define VR_RENUM        0xa3    // renum
#define VR_I2C_RATE     0xa4    // I2C bus rate, 100KHz or 400 KHz
#define VR_7SEG         0xa5    // Update 7-seg readout
#define VR_LEDS         0xa6    // Update LEDS
#define VR_EEPROM_WRITE 0xa7    // download the data to eeprom*/
//BYTE xdata REG012[3]={0x07,0x02,0x98};  //snap shot value
 
//void FX2LPSerial_Init();
//volatile unsigned int count=0;
//unsigned int loop=0;
 
//BOOL  exposure_pulse=0;
//BOOL data_transfer=0;
 
// EZUSB FX2 PORTA = slave fifo enable(s), when IFCFG[1:0]=11
//sbit PA0 = IOA ^ 0;             // alt. func., INT0#
//sbit PA1 = IOA ^ 1;             // alt. func., INT1#
// sbit PA2 = IOA ^ 2;          // is SLOE
//sbit PA3 = IOA ^ 3;             // alt. func., WU2
// sbit PA4 = IOA ^ 4;          // is FIFOADR0
// sbit PA5 = IOA ^ 5;          // is FIFOADR1
// sbit PA6 = IOA ^ 6;          // is PKTEND
// sbit PA7 = IOA ^ 7;          // is FLAGD
 
/* EZUSB FX2 PORTC i/o...       port NA for 56-pin FX2
 sbit PC0 = IOC ^ 0;
 sbit PC1 = IOC ^ 1;
sbit PC2 = IOC ^ 2;
sbit PC3 = IOC ^ 3;
 sbit PC4 = IOC ^ 4;
sbit PC5 = IOC ^ 5;
sbit PC6 = IOC ^ 6;
 sbit PC7 = IOC ^ 7;*/
 
// EZUSB FX2 PORTB = FD[7:0], when IFCFG[1:0]=11
// sbit PB0 = IOB ^ 0;
// sbit PB1 = IOB ^ 1;
// sbit PB2 = IOB ^ 2;
// sbit PB3 = IOB ^ 3;
// sbit PB4 = IOB ^ 4;
// sbit PB5 = IOB ^ 5;
// sbit PB6 = IOB ^ 6;
// sbit PB7 = IOB ^ 7;
 
 /*EZUSB FX2 PORTD = FD[15:8], when IFCFG[1:0]=11 and WORDWIDE=1
sbit PD0 = IOD ^ 0;
sbit PD1 = IOD ^ 1;
sbit PD2 = IOD ^ 2;
sbit PD3 = IOD ^ 3;
sbit PD4 = IOD ^ 4;
sbit PD5 = IOD ^ 5;
sbit PD6 = IOD ^ 6;
sbit PD7 = IOD ^ 7;*/
 
// EZUSB FX2 PORTE is not bit-addressable...
 
//-----------------------------------------------------------------------------
// Task Dispatcher hooks
// The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------
//void LED_Off (BYTE LED_Mask);
//void LED_On (BYTE LED_Mask);
 
//-----------------------------------------------------------------------------
// Task Dispatcher hooks
//   The following hooks are called by the task dispatcher.
//-----------------------------------------------------------------------------
 
 
void TD_Init( void )
{ // Called once at startup
 
  CPUCS = 0x12; /// CLKSPD[1:0]=01, for 24MHz 0x08,12mhz 0x02,48mhz 0x12 operation, output CLKOUT
  //FX2LPSerial_Init(); 
  PINFLAGSAB = 0x08;            // FLAGA - EP2EF
//    PINFLAGSAB = 0x00;            
    SYNCDELAY;
 PINFLAGSCD = 0xE0;         // FLAGD - EP6FF
  //  PINFLAGSCD = 0x00;            
  SYNCDELAY;
  OED=0xB8;    //  b7 b6 b5 b4 b3 b2 b1 b0
  //IOD=0xB8; 
  FIFOPINPOLAR = 0x04;          // Setting SLWR active HIGH
  SYNCDELAY;
  EZUSB_InitI2C();
SYNCDELAY;
 IFCONFIG = 0x03;  // external clock, synchronous, Slave FIFO interface,OE disabled.
  //IFCONFIG = 0x03; 
  SYNCDELAY;
  //OED=0x18;
  //IOD=0x00;
  // IFCLKSRC=1   , FIFOs executes on internal clk source 
  // xMHz=1       , 48MHz operation
  // IFCLKOE=1    ,Drive IFCLK pin signal at 48MHz
  // IFCLKPOL=0   , Don't invert IFCLK pin signal from internal clk
  // ASYNC=0      , master samples synchronous
  // GSTATE=0     , Don't drive GPIF states out on PORTE[2:0], debug WF
  // IFCFG[1:0]=11, FX2 in slave FIFO mode
 
  // Registers which require a synchronization delay, see section 15.14
  // FIFORESET        FIFOPINPOLAR
  // INPKTEND         OUTPKTEND
  // EPxBCH:L         REVCTL
  // GPIFTCB3         GPIFTCB2
  // GPIFTCB1         GPIFTCB0
  // EPxFIFOPFH:L     EPxAUTOINLENH:L
  // EPxFIFOCFG       EPxGPIFFLGSEL
  // PINFLAGSxx       EPxFIFOIRQ
  // EPxFIFOIE        GPIFIRQ
  // GPIFIE           GPIFADRH:L
  // UDMACRCH:L       EPxGPIFTRIG
  // GPIFTRIG
  
  // Note: The pre-REVE EPxGPIFTCH/L register are affected, as well...
  //      ...these have been replaced by GPIFTC[B3:B0] registers
 
  // EP4 and EP8 are not used in this implementation...
                   
  EP2CFG = 0xE2;                //clear valid bit(not used)
  SYNCDELAY;                    
  EP6CFG = 0xE0;                //in 512 bytes, 4x, bulk
  SYNCDELAY;              
  EP4CFG = 0xA2;                //clear valid bit(not used)
  SYNCDELAY;                     
  EP8CFG = 0x02;                //clear valid bit(not used)
  SYNCDELAY;   
 
  //SYNCDELAY;
  FIFORESET = 0x80;             // activate NAK-ALL to avoid race conditions
  SYNCDELAY;                    // see TRM section 15.14
  FIFORESET = 0x02;             // reset, FIFO 2
  SYNCDELAY;                    // 
  FIFORESET = 0x04;             // reset, FIFO 4
  SYNCDELAY;                    // 
  FIFORESET = 0x06;             // reset, FIFO 6
  SYNCDELAY;                    // 
  FIFORESET = 0x08;             // reset, FIFO 8
  SYNCDELAY;                    // 
  FIFORESET = 0x00;             // deactivate NAK-ALL
 
 // FIFOPINPOLAR = 0x04;            // Setting SLWR active HIGH
  //SYNCDELAY;
 /* EP2FIFOCFG = 0xFE;
  EP4FIFOCFG = 0xFE;
  EP6FIFOCFG = 0x00;
  EP8FIFOCFG = 0xFE;*/
  EP2FIFOCFG = 0x04;
  EP4FIFOCFG = 0x04;
  EP6FIFOCFG = 0x04;
  EP8FIFOCFG = 0x04;
 // EP6FIFOCFG = 0x00;
 // EP6FIFOCFG = 0x08;
  SYNCDELAY;                     
  EP6AUTOINLENH = 0x02;
    SYNCDELAY;
    EP6AUTOINLENL = 0x00;
    SYNCDELAY;
    PORTACFG = 0x02;
    TCON = 0x04;
    IE = 0x84;
    IT1=1;      //edge detected
    //PX1 = 1;
   //PD4=0;
//PD3=1;
//PD5=0;
EZUSB_WriteI2C(Image_Sensor, 0x03, REG014); //invert LV
EZUSB_WriteI2C(Image_Sensor, 0x03, REG01);  //SNAPSHOT
//EZUSB_WriteI2C(Image_Sensor, 0x03, REG04);
//EZUSB_WriteI2C(Image_Sensor, 0x03, REG05);
//EZUSB_WriteI2C(Image_Sensor, 0x03, REG06);
EZUSB_WriteI2C(Image_Sensor, 0x03, REG07); //VB
EZUSB_WriteI2C(Image_Sensor, 0x03, REG03); //AGC/AEC
EZUSB_WriteI2C(Image_Sensor, 0x03, REG02); //EXPOSURE TIME
//EZUSB_WriteI2C(Image_Sensor, 0x03, REG012);
 
IOD=0x00;
PD5=0;
//SYNCDELAY;
//IFCONFIG = 0x03;
 
}
 
 
void TD_Poll( void )
{ 
 
 
//EZUSB_ReadI2C(Image_Sensor, 0x02,&EP2FIFOBUF[0]);
 //   SYNCDELAY;
  //     EP2BCH=0x00; 
//     SYNCDELAY;
//      EP2BCL=0x02;
       // SYNCDELAY;
      // EP4BCH=0x00; 
       // SYNCDELAY;
       //EP4BCL=0x02;
       //SYNCDELAY;
//vendor_com=1;
 
if(vendor_com==1/*&&PA1==1*/)
{
//EP6FIFOCFG = 0x08;
//SYNCDELAY;
vendor_com=0;
EZUSB_Delay(10);
EP6FIFOCFG = 0x08;
SYNCDELAY;
//PD7=1;
PD5=1;
EZUSB_Delay(100);
PD5=0;
//PD7=0;
//exposure_time=1;
//while(PA1==0);
//EZUSB_Delay(100);
//EP6FIFOCFG = 0x08;
//EP6FIFOCFG = 0xFE; //Switching to Auto mode
//data_transfer=1;
}
//if(interrupt_flag)
//{
//EP6FIFOCFG = 0x00;
//interrupt_flag=0;
//}
 
/* if(exposure_time)
{
exposure_time=1;
EZUSB_Delay(100);
EP6FIFOCFG = 0x08;
} */
 
//if(data_transfer==1)
//{
//EP6FIFOCFG = 0xFE; //Switching to Auto mode
//}
 
 
}
 
 
        
 
BOOL TD_Suspend( void )          
{ // Called before the device goes into suspend mode
   return( TRUE );
}
 
BOOL TD_Resume( void )          
{ // Called after the device resumes
   return( TRUE );
}
 
//-----------------------------------------------------------------------------
// Device Request hooks
//   The following hooks are called by the end point 0 device request parser.
//-----------------------------------------------------------------------------
BOOL DR_GetDescriptor( void )
{
   return( TRUE );
}
 
BOOL DR_SetConfiguration( void )   
{ // Called when a Set Configuration command is received
  
  Configuration = SETUPDAT[ 2 ];
  return( TRUE );        // Handled by user code
}
 
BOOL DR_GetConfiguration( void )   
{ // Called when a Get Configuration command is received
   EP0BUF[ 0 ] = Configuration;
   EP0BCH = 0;
   EP0BCL = 1;
   return(TRUE);          // Handled by user code
}
 
BOOL DR_SetInterface( void )       
{ // Called when a Set Interface command is received
   AlternateSetting = SETUPDAT[ 2 ];
   return( TRUE );        // Handled by user code
}
 
BOOL DR_GetInterface( void )       
{ // Called when a Set Interface command is received
   EP0BUF[ 0 ] = AlternateSetting;
   EP0BCH = 0;
   EP0BCL = 1;
   return( TRUE );        // Handled by user code
}
 
BOOL DR_GetStatus( void )
{
   return( TRUE );
}
 
BOOL DR_ClearFeature( void )
{
   return( TRUE );
}
 
BOOL DR_SetFeature( void )
{
   return( TRUE );
}
 
BOOL DR_VendorCmnd( void )
{
    switch(SETUPDAT[1])
    { //TPM handle new commands
 
        case Data_control:
     
vendor_com=1;
//IFCONFIG = 0x03;
// SYNCDELAY;
//EP6FIFOCFG = 0x08;
//SYNCDELAY;
//PD3=~PD3;
        
        break;
 
    //  case no_data_control:
            
    //  break;
 
        
                
    
    }
  return(FALSE);
}
 
//-----------------------------------------------------------------------------
// USB Interrupt Handlers
//   The following functions are called by the USB interrupt jump table.
//-----------------------------------------------------------------------------
 
 
    
// Setup Data Available Interrupt Handler
void ISR_Sudav( void ) interrupt 0
{
   GotSUD = TRUE;         // Set flag
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmSUDAV;      // Clear SUDAV IRQ
}
 
// Setup Token Interrupt Handler
void ISR_Sutok( void ) interrupt 0
{
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmSUTOK;      // Clear SUTOK IRQ
}
 
void ISR_Sof( void ) interrupt 0
{
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmSOF;        // Clear SOF IRQ
}
 
//This function is called on receiving the USB Reset interrupt
void ISR_Ures( void ) interrupt 0
{
   if ( EZUSB_HIGHSPEED( ) )
   {
      pConfigDscr = pHighSpeedConfigDscr;
      pOtherConfigDscr = pFullSpeedConfigDscr;
   }
   else
   {
      pConfigDscr = pFullSpeedConfigDscr;
      pOtherConfigDscr = pHighSpeedConfigDscr;
   }
   
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmURES;       // Clear URES IRQ
}
 
void ISR_Susp( void ) interrupt 0
{
   Sleep = TRUE;
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmSUSP;
}
 
void ISR_Highspeed( void ) interrupt 0
{
   if ( EZUSB_HIGHSPEED( ) )
   {
      pConfigDscr = pHighSpeedConfigDscr;
      pOtherConfigDscr = pFullSpeedConfigDscr;
   }
   else
   {
      pConfigDscr = pFullSpeedConfigDscr;
      pOtherConfigDscr = pHighSpeedConfigDscr;
   }
 
   EZUSB_IRQ_CLEAR( );
   USBIRQ = bmHSGRANT;
}
void ISR_Ep0ack( void ) interrupt 0
{
}
void ISR_Stub( void ) interrupt 0
{
}
void ISR_Ep0in( void ) interrupt 0
{
}
void ISR_Ep0out( void ) interrupt 0
{
}
void ISR_Ep1in( void ) interrupt 0
{
}
void ISR_Ep1out( void ) interrupt 0
{
}
void ISR_Ep2inout( void ) interrupt 0
{
}
void ISR_Ep4inout( void ) interrupt 0
{
}
void ISR_Ep6inout( void ) interrupt 0
{
}
void ISR_Ep8inout( void ) interrupt 0
{
}
void ISR_Ibn( void ) interrupt 0
{
}
void ISR_Ep0pingnak( void ) interrupt 0
{
}
void ISR_Ep1pingnak( void ) interrupt 0
{
}
void ISR_Ep2pingnak( void ) interrupt 0
{
}
void ISR_Ep4pingnak( void ) interrupt 0
{
}
void ISR_Ep6pingnak( void ) interrupt 0
{
}
void ISR_Ep8pingnak( void ) interrupt 0
{
}
void ISR_Errorlimit( void ) interrupt 0
{
}
void ISR_Ep2piderror( void ) interrupt 0
{
}
void ISR_Ep4piderror( void ) interrupt 0
{
}
void ISR_Ep6piderror( void ) interrupt 0
{
}
void ISR_Ep8piderror( void ) interrupt 0
{
}
void ISR_Ep2pflag( void ) interrupt 0
{
}
void ISR_Ep4pflag( void ) interrupt 0
{
}
void ISR_Ep6pflag( void ) interrupt 0
{
}
void ISR_Ep8pflag( void ) interrupt 0
{
}
void ISR_Ep2eflag( void ) interrupt 0
{
}
void ISR_Ep4eflag( void ) interrupt 0
{
}
void ISR_Ep6eflag( void ) interrupt 0
{
}
void ISR_Ep8eflag( void ) interrupt 0
{
}
void ISR_Ep2fflag( void ) interrupt 0
{
}
void ISR_Ep4fflag( void ) interrupt 0
{
}
void ISR_Ep6fflag( void ) interrupt 0
{
}
void ISR_Ep8fflag( void ) interrupt 0
{
}
void ISR_GpifComplete( void ) interrupt 0
{
}
void ISR_GpifWaveform( void ) interrupt 0
{
}

---

 

[adityamflow]

Re: CYPRESS FXLP & WVGA SENSOR in Snapshot Mode

being fx2lp is pritty old one i am not getting much support from community