[moved] CMOS Ring Oscillator Simulation

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catalin560

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Hello Forum! Noob engie here!
So I have this 3-stage ring oscillator of which I have to do a tran analysis and get a periodic wave that looks like its oscillating...however all my attempts have been far from what I'm trying to achieve... Check out these screenshots:






 

Re: CMOS Ring Oscillator Simulation

Your circuit is missing the important RC that sets its frequency. Here is how Cmos oscillators have been made for the last 42 years:
 

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Re: CMOS Ring Oscillator Simulation

Your circuit is missing the important RC that sets its frequency.
No.
Ring Oscillator does not require such RC.

Cascaded inverters of odd numbers cause oscillation if a loop is configured by them due to propagation delay of inverter.

So I have this 3-stage ring oscillator of which I have to do a tran analysis and get a periodic wave that looks like its oscillating...
however all my attempts have been far from what I'm trying to achieve... Check out these screenshots:
Use Step Pulse for Vdd to start up oscillation.
 

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Re: CMOS Ring Oscillator Simulation

Use Step Pulse for Vdd to start up oscillation.


Sorry but how do I do that? Like I said, right now I barely got the basics of circuit design/simulation...
 

Re: CMOS Ring Oscillator Simulation

Sorry but how do I do that?
E.g. by reviewing previous discussions about oscillator simulation. Instead of using a "kickstart" pulse, you can also skip the initial transient simulation (option UIC = 1).

There's a certain risk that your ring oscillator hasn't enough gain at 60 degree phase shift and the three inverter oscillator doesn't work. In this case, you should try five stages.
 

Re: CMOS Ring Oscillator Simulation

Sorry but how do I do that?
Like I said, right now I barely got the basics of circuit design/simulation...
What simulator do you use ?
It seems you use Cadence Virtuso.
Do you use Cadence Spectre as simulator ?
If so replace "analogLib/vdc" with "analogLib/vpulse".

vpulse1 (1 0) vsource type=pulse val0=0 val1=5 period=10 rise=1n

If you prefer initial condition for node, set x=0, y=Vdd.
 
Re: CMOS Ring Oscillator Simulation

The ring oscillator without an RC is very crude because its frequency depends on the propagation delay that changes when the supply voltage or load capacitance changes. Each IC will produce a different frequency and some will not oscillate.
 
Re: CMOS Ring Oscillator Simulation



No, I can only use ADE (Analog Design Environment). I did replace vdc with vpulse and got some kind of oscillation, take a look at these screenshots:



I think I'll try mister @Audioguru suggestion and compare the results... Anyway thank you all for your fast and detailed responses...
 

Re: CMOS Ring Oscillator Simulation

The ring oscillator without an RC is very crude because its frequency depends on the propagation delay that changes when the supply voltage or load capacitance changes. Each IC will produce a different frequency and some will not oscillate.
These are all natural characteristics of ring oscillator.

One purpose of the ring oscillator is an evaluation of average propagation delay of inverter.

And ring oscillator is used as VCO in PLL system.

Here RC is never added.
 
No, I can only use ADE (Analog Design Environment).
No.
You can not understand EDA Tools you use at all.

You use followings.

Design Framework : Cadence dfII of IC6 which is launched by command "virtuoso".
Previously a name of "virtuoso" is used only for schematic editor, symbol editor and layout editor.
However a name of "virtuoso" is used for Design Framework of IC6.

Simulator : Cadence Spectre.
You launch Cadence Spectre from Cadence ADE on Cadence Virtuso Design Framework.

Post Processing : Cadence ViVA
You use Cadence ViVA from Cadence ADE

So you use Cadence Spectre as Simulator.

I did replace vdc with vpulse and got some kind of oscillation, take a look at these screenshots:
Fine.

I think I'll try mister @Audioguru suggestion and compare the results...
What is your ring oscillator's purpose ?

(1) Evaluation of averaged propagation delay of Inverter ?
(2) As VCO in PLL ? See attached figure
(3) Simple clock generator purpose ?

We don't add RC network for (1) and (2).

If your purpose is (3), https://www.edaboard.com/threads/354854/#7 is true.
So you might follow https://www.edaboard.com/threads/354854/#2
However we don't call this circuit ring oscillator.
 

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