911pcb
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It is essential for the physical production of circuits, regardless of whether a schematic is used to assemble it by hand on a breadboard or to create a printed circuit board. A schematic is a crucial step in the physical production of a circuit. It will prevent costly and time-consuming debugging and rework, revisions or revisions to PCBs.
This article outlines tools and practices that we have used over time to reduce errors and create a complete and accurate schematic.
Accurate Schematics Begin with Accurate and Complete Symbols
Accurate symbols are the foundation of a reliable schematic. You must be familiar with the symbol editor of your schematic capture software. You will still need to be able to see and verify the properties of symbols even if you don't have to create them yourself. Let's see what we mean when we say an exact and complete symbol.
The symbol must have all pins on the part visible. There should be 44 pins on the symbol for each 44-pin part. We don't use invisible pins like power or ground pins. We always show "No Connect" pins. Two types of "No Connects" will be discussed. Pins that should not be connected are the first "No Connect". They can be disconnected from the part, or used by the manufacturer for testing.
The U3 schematic has three pins (9-10-15) that are not to be connected but can always remain "open". The schematic program allows for a "Not Connected” type to be assigned as part of the symbol. These pins are marked permanently with an "x". As shown in the schematic, we give them unique names like NC1, NC2, etc. Schematic programs allow duplicate names, such as "VCC". We give "No Connects", unique names, by adding a number in a base name of NC.
Pins that may be connected, but not connected in a specific design are the second category of "No Connects". Pins 5, 6 and 7 may be connected to one another, but they are not connected in this design. A lot of schematic programs allow unconnected pins to be marked with a "Not connected" symbol (usually an "X") as part the schematic. Any warnings or errors caused by an open pin in a program that does not include the "Not Connected symbol" can be ignored.
It is crucial to assign the correct "electrical type" to each pin when building a symbol. These pin types are used in ERC, or Electrical Rules Checking. We'll cover this later. A menu is used to add a type to a pin. The Electrical Type selection displays a list with typical electrical characteristics of a pin.
Sometimes it takes some creativity to choose the right type. Choose the closest one. If there is no other choice, I choose "Passive", which bypasses ERC. Some programs may not have the "Not connected" type. If it is not available, I choose a type that is most likely to cause an ERC error if it's connected to something. It all depends on how the ERC rules are set up.
FPGAs, microcontrollers, and connectors all require that the symbol be modified in order to assign the proper electrical type to several pins. This is because the type of the part is design dependent. Modify pin types according to the signals assigned to pins.
The final step to creating a symbol is to find a quiet spot without distractions, and then sit down with the datasheets and symbol editor. I inspect each piece carefully and verify that each pin has the correct number, name, and electrical type. Check that all pins are present. When the schematic is complete, it is a good idea for you to inspect the symbols.
You may avoid repeating the same error by taking some time between creating the symbol and final checking.
Electric Rules Checking
ERC, or Electrical Rules Checking, is a utility that checks for improper connections. It uses a set of rules. The rules generally look for connections between incompatible pins. The rules are generally specified using a "Connection Matrix".
Here's an example:
Each type of pin can be assigned a row or column in the matrix.A rule is given to any combination of pins that are defined by the intersection of rows and columns. A green element in the matrix indicates that a connection is permitted between the two types. An "E" indicates that the report is in error. An error in the report is indicated by an "E". A default matrix is always used to represent a set of common rules. The matrix might need to be modified for your circuit.
ERC is subject to limitations. Each pin must have a unique pin type.Also, the rules matrix for each circuit must be meaningful. You can still run ERC on the schematic, even with these limitations. Make modifications to the rules matrix of your circuit, and then modify the schematic.
How to check a net list
911EDA PCB designers always do a manual scan on the netlist. Although there may be disagreement about the necessity of this check, we have found errors that passed all other checks. Finding one error is worth the effort, according to me. This is how the technique can be broken down into steps.
Step 1: Give a meaningful name for all nets.
Although the names may be brief and not meaningful to the designer, each net should have an unique name. It is common to use three or four letters. The schematic program can assign a name if a name has not been assigned by the designer. It all depends on the netlist format. Names are often assigned a number that is preceded by an "N". For example, "N0001234". Each net connected to U3 is given a name by the designer in the schematic.
Step 2: Create a netlist format.
It is important to choose a format that supports your schematic program and is easily readable by a human.
These formats are disappearing over time, which is a sad trend. You can use "Wirelist" as a base format. Wirelist was used in the past to wire circuits manually.This is an example of how we refer to a simple format.
Step 3: Rename all nets that were named by the schematic program.
Locate and rename nets with names that were not created by the designer but are instead assigned names by the schematic software.
You can open the netlist using a text editor to search for the appropriate strings. Or, you can manually scan the net connections to find the names that have been assigned. These nets should be given meaningful names. Rebuild the net list again and search again. Continue searching until all the automatically assigned names are gone.
Step 4: Perform a manual scan of the netlist in order to identify errors.
It takes patience and practice, but it is worth it if you find one mistake in a design. The designer will be able to tell the number of connections for a specific net. The example shows that net "APD40", which has two connections, is connected to the net. All nets named "APDnn", however, have two connections. There is a problem if there aren't two connections. This is especially important to verify that there are both power and ground connections. If you know that 10 pins are powered from a net called VCC_5V then look for ten connections on the netlist.
Assigning meaningful net names has other benefits. It is easier to find nets in error reports. It makes it easier for PCB designers to communicate with others involved in the project.
Although it is not a good idea, having sequential reference designers with no missing numbers is a good practice. This helps keep things neat and stops others from wondering if there is a missing part. You can reduce confusion by noting the skipped reference designations in the schematic.
This article outlines tools and practices that we have used over time to reduce errors and create a complete and accurate schematic.
Accurate Schematics Begin with Accurate and Complete Symbols
Accurate symbols are the foundation of a reliable schematic. You must be familiar with the symbol editor of your schematic capture software. You will still need to be able to see and verify the properties of symbols even if you don't have to create them yourself. Let's see what we mean when we say an exact and complete symbol.
The symbol must have all pins on the part visible. There should be 44 pins on the symbol for each 44-pin part. We don't use invisible pins like power or ground pins. We always show "No Connect" pins. Two types of "No Connects" will be discussed. Pins that should not be connected are the first "No Connect". They can be disconnected from the part, or used by the manufacturer for testing.
The U3 schematic has three pins (9-10-15) that are not to be connected but can always remain "open". The schematic program allows for a "Not Connected” type to be assigned as part of the symbol. These pins are marked permanently with an "x". As shown in the schematic, we give them unique names like NC1, NC2, etc. Schematic programs allow duplicate names, such as "VCC". We give "No Connects", unique names, by adding a number in a base name of NC.
Pins that may be connected, but not connected in a specific design are the second category of "No Connects". Pins 5, 6 and 7 may be connected to one another, but they are not connected in this design. A lot of schematic programs allow unconnected pins to be marked with a "Not connected" symbol (usually an "X") as part the schematic. Any warnings or errors caused by an open pin in a program that does not include the "Not Connected symbol" can be ignored.
It is crucial to assign the correct "electrical type" to each pin when building a symbol. These pin types are used in ERC, or Electrical Rules Checking. We'll cover this later. A menu is used to add a type to a pin. The Electrical Type selection displays a list with typical electrical characteristics of a pin.
Sometimes it takes some creativity to choose the right type. Choose the closest one. If there is no other choice, I choose "Passive", which bypasses ERC. Some programs may not have the "Not connected" type. If it is not available, I choose a type that is most likely to cause an ERC error if it's connected to something. It all depends on how the ERC rules are set up.
FPGAs, microcontrollers, and connectors all require that the symbol be modified in order to assign the proper electrical type to several pins. This is because the type of the part is design dependent. Modify pin types according to the signals assigned to pins.
The final step to creating a symbol is to find a quiet spot without distractions, and then sit down with the datasheets and symbol editor. I inspect each piece carefully and verify that each pin has the correct number, name, and electrical type. Check that all pins are present. When the schematic is complete, it is a good idea for you to inspect the symbols.
You may avoid repeating the same error by taking some time between creating the symbol and final checking.
Electric Rules Checking
ERC, or Electrical Rules Checking, is a utility that checks for improper connections. It uses a set of rules. The rules generally look for connections between incompatible pins. The rules are generally specified using a "Connection Matrix".
Here's an example:
Each type of pin can be assigned a row or column in the matrix.A rule is given to any combination of pins that are defined by the intersection of rows and columns. A green element in the matrix indicates that a connection is permitted between the two types. An "E" indicates that the report is in error. An error in the report is indicated by an "E". A default matrix is always used to represent a set of common rules. The matrix might need to be modified for your circuit.
ERC is subject to limitations. Each pin must have a unique pin type.Also, the rules matrix for each circuit must be meaningful. You can still run ERC on the schematic, even with these limitations. Make modifications to the rules matrix of your circuit, and then modify the schematic.
How to check a net list
911EDA PCB designers always do a manual scan on the netlist. Although there may be disagreement about the necessity of this check, we have found errors that passed all other checks. Finding one error is worth the effort, according to me. This is how the technique can be broken down into steps.
Step 1: Give a meaningful name for all nets.
Although the names may be brief and not meaningful to the designer, each net should have an unique name. It is common to use three or four letters. The schematic program can assign a name if a name has not been assigned by the designer. It all depends on the netlist format. Names are often assigned a number that is preceded by an "N". For example, "N0001234". Each net connected to U3 is given a name by the designer in the schematic.
Step 2: Create a netlist format.
It is important to choose a format that supports your schematic program and is easily readable by a human.
These formats are disappearing over time, which is a sad trend. You can use "Wirelist" as a base format. Wirelist was used in the past to wire circuits manually.This is an example of how we refer to a simple format.
Step 3: Rename all nets that were named by the schematic program.
Locate and rename nets with names that were not created by the designer but are instead assigned names by the schematic software.
You can open the netlist using a text editor to search for the appropriate strings. Or, you can manually scan the net connections to find the names that have been assigned. These nets should be given meaningful names. Rebuild the net list again and search again. Continue searching until all the automatically assigned names are gone.
Step 4: Perform a manual scan of the netlist in order to identify errors.
It takes patience and practice, but it is worth it if you find one mistake in a design. The designer will be able to tell the number of connections for a specific net. The example shows that net "APD40", which has two connections, is connected to the net. All nets named "APDnn", however, have two connections. There is a problem if there aren't two connections. This is especially important to verify that there are both power and ground connections. If you know that 10 pins are powered from a net called VCC_5V then look for ten connections on the netlist.
Assigning meaningful net names has other benefits. It is easier to find nets in error reports. It makes it easier for PCB designers to communicate with others involved in the project.
Cross Reference checks
The schematic program will allow you to create a bill-of-materials (BOM) or Cross Reference Report. You can use the report to verify for missing, mistyped or malformed reference designations.Although it is not a good idea, having sequential reference designers with no missing numbers is a good practice. This helps keep things neat and stops others from wondering if there is a missing part. You can reduce confusion by noting the skipped reference designations in the schematic.