[SOLVED] mosfet totem pole voltage

[Zak28]

Is it safe to use a PMOS with a lower Vds than its NMOS counterpart?

It seems only the NMOS counterpart interacts with the high voltage and the PMOS would be unharmed in this circuit.

 

[barry]

If you turn that pot all the way to the end, you’ll have 48 volts on the PMOS source.

Actually, upon closer examination, that PMOS will NEVER turn on.

 

[Zak28]

That is a hazard which can be removed with a series resistor to the pot or using a voltage divider instead of the pot.

But the question was whether the PMOS is completely absent of any high voltage transients which can damage it.

 

[KlausST]

Hi,

Is it safe to use a PMOS with a lower Vds than its NMOS counterpart?

A Mosfet does not know about it's counterpart, a Mosfet dies not know about GND potential (as long as none of the three legs is directly connected to GND), it just sees the voltage differences between it's three pins. That is what you have to take care about.

Now you talk about transients:
Don't be afraid of using capacitors. They will help to reduce transients. Use them to stabilize the input powrr supply, the gate voltage and the output voltage.

Transient voltages - because of their HF nature- will be divided by the HF impedance.
Thus it mainly will depend on the (not shown) capacitance between D and S of the Mosfets ... and the stray impedance of the PCB layout.

A zener across the pot (with series impedance) will improve gate to GND voltage.
But the circuit lacks of the ability to control the output voltage. When the output voltage is i the range of V_gate (w.r.t. GND) - V_GSth of upper Mosfet ... to V_gate + V_GSth of lower Mosfet ... the output voltage is not controlled at all.
This means a range of several volts of uncontrolled output voltage.

If you want somehow controlled output voltage I recommend to use proven standard circuits...or even better: dedicated ICs.

Klaus

 

[barry]

I still don’t see how this circuit will do anything. In order for the bottom(PMOS) to turn on, its gate voltage has to be lower than its source. That will never happen.

 

[Zak28]

I still don’t see how this circuit will do anything. In order for the bottom(PMOS) to turn on, its gate voltage has to be lower than its source. That will never happen.

The PMOS can be logic level which would turn on at 5Vgs, also the pot was just for a reference.

 

[barry]

The PMOS can be logic level which would turn on at 5Vgs, also the pot was just for a reference.

Nope. The gate has to be five volts LOWER than the source. How is that going to happen?