diarmuid
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Hello All,
Razavis book (pg. 585) states that threshold voltage increases with length.
For a 90nm process I have seen the opposite for both NMOS and PMOS (L=1um).
For a 180nm process I have seen the threshold of an NMOS decreasing with increasing L and the threshold
of a PMOS increasing with increasing length (for L=1um).
All these results seem to contradict each other!
Does anyone have an idea of what is going on?
Thanks,
Diarmuid
Razavis book (pg. 585) states that threshold voltage increases with length.
For a 90nm process I have seen the opposite for both NMOS and PMOS (L=1um).
For a 180nm process I have seen the threshold of an NMOS decreasing with increasing L and the threshold
of a PMOS increasing with increasing length (for L=1um).
All these results seem to contradict each other!
Does anyone have an idea of what is going on?
Thanks,
Diarmuid