After a look in deep in the attached photos the switching curves of the gates,and i am wondering if this switching is acceptable for work MOSFET in spwm H bridge LF inverter.I would like your general opinion on all points and your suggestion for some improvement.
Details for the system:
.Dead time at 1 μs for test reasons
.Driver IC ir2113s
.Totem pole gate driver amplifier 7 amps with mosfet.(Attached photo)
.Power mosfets FDH055N15A (6 in parallel)
.Rg is 6.8 ohm (for each mosfet)
.Rgs is 33 kohm ( for each mosfet)
.I use antiparallel diodes for each.
Thank you in advance !
Presume waveforms are recorded with no H-bridge supply voltage (too clear). Would like to see loaded waveforms. Rise/falltimes are relative high, is it OK for your application?
The bridge supply voltage is at 20 volts DC and no load.
Also the iron transformer is absent.
, The signals that the spwm microcontroller gives us come out with 70ns anode and cathode switching. Is there any solution to increase the switching speed as much as possible and or , keep this speed until the gates?
Is there any ic solution to increase further the rise and fall times?
So,let's ignore the increase of speed because is another question.
My very first ask Is,if the negative voltage overshoot oscillations of the fall curve at the mosfet gates is acceptable ?
Is a must to slow down the fall speed ?