MOSFET driver not working

[FreshmanNewbie]

I'm having an issue with the MIC4606-2YML evaluation board.

There is no voltage waveform at the LOAD side output connector during operation. The bus voltage, VBUS, is at 24VDC and the VDD voltage to the gate driver section is at 12VDC. The APWM and BPWM input signals are present (these are 180 degrees out of phase running at 12500Hz, both at 50% duty cycle) and the EN (enable) line is pulled up as expected. I had this working nicely yesterday using the PIC32MK MCM Curiosity Pro Dev Board. This morning, however, I do not see anything on the output. I have verified that the input PWM signals are present, the bus voltage is present, the ENABLE signal is high, and the MOSFETs appear to be "healthy" and non-shorted. Any thoughts on what might be causing the MIC4606-2 to not drive the full bridge FETs?

 

[D.A.(Tony)Stewart]

@FreshmanNewbie report all the pin voltages.

 

[FreshmanNewbie]

@FreshmanNewbie report all the pin voltages.

I've looked at test points on the MOSFET gates and there are no gate drive signals present on ANY of the MOSFET output stages. At this point, I believe that the MIC4606-2YML is damaged. What I am trying to understand is what was the root cause of the failure, or possible failure mechanisms. I've been digging deeper into the user guide for the development board and the datasheet. The user guide states to turn on VDD first (power to the MIC4606), then VIN (the bridge bus voltage). However, the datasheet shows a block diagram of a typical application circuit showing VIN feeding both the h-bridge bus and a switching power supply (MIC28511) which feeds the VDD of the gate driver. The MIC28511 has a 5mS soft start internal to the device. If we look at the voltage sequencing of the system, the implication is that VDD is delayed as VIN (aka bridge bus voltage, VBUS) is rising. Does VIN to the driver need to be present prior to a voltage being established on the h-bridge?



The test circuit I constructed matched the block diagram shown in the datasheet, with a 12VDC switch mode power supply being supplied by VBUS and also having a 5mS soft start

 

[D.A.(Tony)Stewart]

Your problem seems to be a violation on the input to the kit not the FETs.

CMOS has an inherent vertical PNPN SCR structure that if a logical input or FET Bus output is applied before Vdd to the CMOS PIC chip the SCR can latchup and short VDD inside the CMOS chip.

this means no pin input or output can exceed Vdd by 0.5V when power is applied. or go below Vss by 0.5V

SCR's can be triggered by capacitance pulses too so the same applies to CMOS Shoot-through failure mode such as Bus power drain to gate capacitance to output drive. But you knew about this.

The other possibility is overlapping pulses when it was working for a while.

 

[FreshmanNewbie]

Your problem seems to be a violation on the input to the kit not the FETs.

CMOS has an inherent vertical PNPN SCR structure that if a logical input or FET Bus output is applied before Vdd to the CMOS PIC chip the SCR can latchup and short VDD inside the CMOS chip.

this means no pin input or output can exceed Vdd by 0.5V when power is applied. or go below Vss by 0.5V

SCR's can be triggered by capacitance pulses too so the same applies to CMOS Shoot-through failure mode such as Bus power drain to gate capacitance to output drive. But you knew about this.

The other possibility is overlapping pulses when it was working for a while.

So, the Timing between Vin and Vdd is unimportant? It doesn't play any role?

 

[D.A.(Tony)Stewart]

So, the Timing between Vin and Vdd is unimportant? It doesn't play any role?

Wrong.
"no pin input or output can exceed Vdd by 0.5V when power is applied."

The manual in step 5 says p12 of 29

"5. Turn on the VDD followed by VIN.
Turn on the xHI and xLI inputs (MIC4606−1YML)
orPWM single inputs (MIC4606−2YML).

 

[FreshmanNewbie]

Wrong.
"no pin input or output can exceed Vdd by 0.5V when power is applied."

The manual in step 5 says p12 of 29

"5. Turn on the VDD followed by VIN.
Turn on the xHI and xLI inputs (MIC4606−1YML)
orPWM single inputs (MIC4606−2YML).

Thank you for the answer.

So, I read that Applying MOSFET Vdd to the Driver before Vin to the bridge system does not damage the device.

But how does the MOSFET driver not get damaged with Vdd is applied to the Driver IC before the Vin to the MOSFET bridge system?

 

[D.A.(Tony)Stewart]

the outputs would be powered on as inputs so the sequence should be Vdd ,Vin Vbus
If you had Vin signals before Vdd then it will cause shoot-thru on the IC and then rise in temp. rapidly to a catastrophic failure,. IS that what you did? Or was there some handling EOS/ESD event?