Mos gate capacitance-serious doubt -help sought

[venkateshr]

Hi all,

I have a very serious doubt regarding the capacitance(gate channel ) of mosfet.it is about the capacitance of gate when the voltage(vin) is greater than vt . ppl say that the cap is Cox*W*L . but b4 this it is less due to depletion region (for small vin).
what i ask is that even after Vt depeltion layer will be beneath the channel so that makes one capacitance with channel and substrate as two paltes and dielectric(deple.) between them.so series cap makes the cap. very less.

in short after vt it will look like 3 plates in line so two capacitors with first dielectric
in sio2 and other is depletion.

 

[Apollo13]

Hi Venkatesh,

we have mos cap work in 2 modes. depletion and enhancement.
In depletion mode the cap is b/w gate and substrate and it is wlcox.
So you know the plates.
In enhancement mode the cap is between channel (drain and source) and the gate. Beyound vt again it is w*l* cox

If you have a mos in enhancement mode the plates are never gate and substrate. And you are talkin of that if i understand.

 

[venkateshr]

hi apollo,
what u were saying is abt the diffusion cap which is with the drain/source
with the sub. since they are reverse biased (like varicap diodes).i am talking purely
abt the gate cap only.