MLCC capacitor failure

Just thinking laterally, are the boards stored with this edge downwards where they could pick up some residue from a surface? That violent change of resistance makes me think of moisture and hydroscopic materials. I once came across this with calcium carbonate residues on EHT transformers, they went bang after 15 years.
Frank

I don't get why everyone keeps discussing that there is a mechanical failure of the cap?
The OP stated back in post #11 the following....

tonal said:

It seems that the root cause is not mechanical stress on components or anything similar.
After measuring the capacitor on the PCBA (measured a value ~3KOhm) I desoldered it, measured it again and this time no stray resistance was apparent. I also measured between the PCBA pads but the measurement was too high. I cleaned the board and soldered again the same capacitor and the power supply was again functional!

Click to expand...

That seems to indicate that the cap is developing a resistance path between the pads in parallel with the cap. This would be very much in line with dendrite growth or some contamination that is resulting in accelerated dendrite growth. I suspect removing the cap and replacing it with the same cap probably fixes the problem permanently as the residue has changed due to re-soldering the part onto the board.

Bad design of MLCC near board edge can cause both chip fracture and solder fracture from insufficient solder.
One could view this as a bad process control of solder, but if the design is stressed at the termination solder interface and breaks open, with reasonable depanelization stress, it is still a bad design.

There are only 3 main root causes; Bad design, Bad process, bad parts.
Design includes both board layout and solder stencil design, etc.
Process includes solder, flux, thermal profile, depanelization, etc.
Bad parts may be choice of vendor. Some poor sources have weaker mechanical term. or plating qualities.

I have seen many caps fail from some solder stress while other vendors pass, but the root cause in some cases was process overstress, which may not be the case here. However in some cases, I have seen large MLCC's fail due to operator training on depanelization. ( be more gentle on snap to avoid board warp >>1%)

Every situation is different.

If @ads-ee is correct in his hunch, 10x solder joint inspection will determine if solder process is poor.

Obviously solder control must be a concern with part orientation, pad size, solder paste aperture design ( butterfly or rectangular) stencil thickness, solder profile can affect the results, but a marginal design is always sensitive to design of solder process and process variations. If not using IPC design standards for layout, pad design, stencil design and location of part, yields can be affected adversely and field failure risks are your worst enemy, which is why I suggested vibration for HASS functional testing and examine the design for improvements for quick feedback on accelerating margin risks without causing more damage from reasonable stress. Solder process design is equally important. IPC guidelines are a good starting point.