Minimum lenght for NMOS native Vth transistor??

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weber_8722

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Hi,

in CMOS processes like TSMC 180nm often the minimum channel length of mVth and native Vth transistors is much larger than for normal NMOS or PMOS transistors.

I need a native Vth NMOS with good RF performance, i.e. low Cgs and L. Is that possible, it would hurt the DRC and would have large leakage current (no problem in our case), but what about the physics behind?? Is it possible simply to ignore the rules?:idea:

Best regards
Stephan
 

Very lightly doped body means a lower punchthrough
(BVdss) voltage for the same drawn length. Depletion
extend being inversely proportional to doping density.
For a given working voltage there's only one way to
make that up.

Once you get close to punchthrough, you pick up a lot more
hot carriers and I see low-VT FETs display HCE more strongly
than "normal" ones (esp. VT shift).

What rules you choose to respect, had better match the game
you're in. Or your design might have to tolerate more drift
and variability than the design rules are predicated upon.
 

Thanks for fast feedback and good hints.
I think in one application like making a CML source-follower, just a high-speed buffer with certain special level-shift the native NMOS looks feasible, but for the application as NMOS power device in a LDO the native transistor is not such a good idea anymore, because here in worst-case Vds could be large.

Bye Stephan
 

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