You would prefer (generally) whichever is highest in the
interconnect stack, if all three are available simultaneously.
If they are selected by recipe then it's likely only the
dielectric thickness changes, not the position relative
to substrate.
Now if substrate is ground and the purpose is only storing
bulk DC energy, then (a) you don't care, for that MIM
application (just ground the bottom plate and forget it)
and (b) you still don't care because a MOS capacitor is
going to have much higher capacitance density anyway.
You can use the higher-Q MIM sparingly for peaking /
lowering dynamic impedance of the decoupling. In some
technologies you can place MIM structures over MOS
to get even more density with "good enough" Q.
Now the antenna resonator, which you'll likely want
to "ring up" the voltage enough to do useful harvesting,
that does want minimum stray C (or the stray needs to
be made a useful part of the "tank" by topology) and
high Q. But that is a different and likely much smaller
use of the MIM, than the storage function.
The foundry docs for any decent RF flow ought to give
data for Q and max voltage for each flavor available.
A RFID tag has a very low service factor so you might
be inclined to cheat, or ask for waiver on voltage rules
if breakdown & leakage are OK and reliability rules seem
excessively conservative.