manuel1139
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microblaze vga
Hello Forum Users!
I've built an Microblaze prozessor that runs uClinux. One thing however is still missing - I want to put some VGA framebuffer device to be able to run nanoX on it.
For this to work I need an VGA IP Core build as a framebuffer device. I have already found some cores that are going to build some character generator device with VGA output - but nowadays I want to see some graphics![Smile :) :)](data:image/gif;base64,R0lGODlhAQABAIAAAAAAAP///yH5BAEAAAAALAAAAAABAAEAAAIBRAA7)
Maybe someone knows of an running VGA IP Core?
However I think I will give it a try and improve my VHDL skills and build an VGA Framebuffer core myself.
Maybe someone willing to attend?
This is what I have on top of my head that must be done to get something working:
VGA timings must be implemented. (Should not be that difficult, even with some generics to get different resolutions)
I am going to use the 1MByte SRAM that is already on my spartan starter kit - This must be
- writeable thru the OPB bus (are there bandwith issues?, spartan does not have PLB)
- readable by the VGA core to send the pixels to the VGA
how would that look like in VHDL? Write access during a phase shifted clock? How has this done on VGA graphics cards in the past? I tink they only had some SDRAM on it and allow for resolutions far away from 640x480?
Any more ideas?
Best Regards,
Manuel
Hello Forum Users!
I've built an Microblaze prozessor that runs uClinux. One thing however is still missing - I want to put some VGA framebuffer device to be able to run nanoX on it.
For this to work I need an VGA IP Core build as a framebuffer device. I have already found some cores that are going to build some character generator device with VGA output - but nowadays I want to see some graphics
Maybe someone knows of an running VGA IP Core?
However I think I will give it a try and improve my VHDL skills and build an VGA Framebuffer core myself.
Maybe someone willing to attend?
This is what I have on top of my head that must be done to get something working:
VGA timings must be implemented. (Should not be that difficult, even with some generics to get different resolutions)
I am going to use the 1MByte SRAM that is already on my spartan starter kit - This must be
- writeable thru the OPB bus (are there bandwith issues?, spartan does not have PLB)
- readable by the VGA core to send the pixels to the VGA
how would that look like in VHDL? Write access during a phase shifted clock? How has this done on VGA graphics cards in the past? I tink they only had some SDRAM on it and allow for resolutions far away from 640x480?
Any more ideas?
Best Regards,
Manuel