method to remove hunchback from signal

[yefj]

Hello , In the Vg1 part of the circuit i have a little undesired hunchback.
I dont any positive rise,.
When i added shotkey diode it lowered by half.
Is there a way to eliminate it completly so the signal will go from zero to -12 only?
LTspice files are attached
Thanks.

 

[barry]

it would help if you showed the ENTIRE schematic.

 

[yefj]

Hello Barry , I have attached the full simulation file .
I have a little positive bump I am trying to remove from the Vg1 signal .

 

[dick_freebird]

This is just the gate charge dV/dt pushing through the Cgd faster than the channel can swing the drain current. There is no cure.

Treatment night include series gate resistance to soften the transition (costing you slew rate / speed, or source-switching / -steering.

But is there a blip on the current you'd apply to the source? Oh noes!

 

[crutschow]

Also show the voltage at the U2 output.

 

[FvM]

Problem cause is unsuitable pulsed power supply of comparator TLV3701. It's not designed for this kind of operation.

In simulation setup, using pulsed M12 instead of compator output would solve the problem.

But in real design, you don't have ideal pulsed sources P12 and M12 I presume

 

[mtwieg]

It's unclear what U2 and its pulsed supply rails are actually meant to do. But as it is now, U2 is what produces a "hunchback" signal (though much sharper than at Vg1). The TL431 and/or schottky can't eliminate it entirely.

Like FvM points out, it's unlikely that the pulsed sources V1 and V2 are realistic. If I slow down the rise time of V1 from 1us to 100us, then the "hunchback" goes away entirely, with no other changes.

 

[dick_freebird]

Cdg*dV/dt(gate)*Ron(on_FET)