Memory Stitching during scan

Mak444

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What do we actually stitch when we talk about memory stitching. This question arose because memory doesn't have flip-flops, so how can we stitch them in a scan chain?
Also how we deal with the stitched memories during ATPG?
 

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Mak444 said:
What do we actually stitch when we talk about memory stitching. This question arose because memory doesn't have flip-flops, so how can we stitch them in a scan chain?
Also how we deal with the stitched memories during ATPG?
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I have answer to first one.

First of all, there are 2 types of memories. With scan flip flops and without.

If you have memory with scan flip flops enabled then it will work as below,
Let's say your memory has 50 bits [b0 ... b49] and there are 3 such stitched memories.
So you will attach first memory's b49 to next memory's b0.
each memory will have their own scan chain (and flip flops) which traverse through each bit at each clock.
you will enter first data through b0 and wait for it's output at b49 after so many cycles.

And if it doesn't have those scan flip flops then you need to add extra logic outside the memory.
 

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