Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Memory Stitching during scan

Mak444

Mak444

Newbie
Newbie level 4
Joined
Jun 7, 2024
Messages
5
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
77
What do we actually stitch when we talk about memory stitching. This question arose because memory doesn't have flip-flops, so how can we stitch them in a scan chain?
Also how we deal with the stitched memories during ATPG?
 

LaTeX Commands Quick-Menu:

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top