what is the mechnism behind using heavy surface p+
implant to reduces the collection of dark current(just normal electron/holes) generated at si-sio2 surface?
Seems this is relating to fermi level adjusting so the gene/recomb centers is
filled/depeleted(a techinque used at location you dont want many gene/recomb to
happen)...but I'm not so sure,no semicon physics textbook talks about this in
detail...Can you exlain me or recommand some references?
Re: Mechnism behind technique to suppress gene/recomb center
It's probably more closely related to relaxing/avoiding the stress-induced dislocations that appear in the substrate at the si-sio2 interface. If your photodiode is a n-well on a p-substrate you also can use the p+ to push the charge-space region away from the surface, where the r-g centers appear due to the dislocation faults.
Seems implants cannot help with the stress induced dislocations directly,I think it is related to fermi level adjusting and g/r center filling(depeletion).
What is about p+ push away thing?nwell/psub diode already has its charge space away from surface
Re: Mechnism behind technique to suppress gene/recomb center
p++ to sio2 interface has less stress I think (not sure, look up gated diodes papers for that). p++ on top of n-well will push away the space-charge region at the sides of the n-well / psub junction, where it touches the si/sio2 interface.
Re: Mechnism behind technique to suppress gene/recomb center
n1cm0c said:
p++ to sio2 interface has less stress I think (not sure, look up gated diodes papers for that). p++ on top of n-well will push away the space-charge region at the sides of the n-well / psub junction, where it touches the si/sio2 interface.
about the push away thing,do you mean due to the sio2 interface is occupied by p++ implant,then the sapce charge is push down to p++/nwell interface which away from sio2?