HariHerekar
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Measuring Power Mosfet VDS
Just looking for a rudimentary explanation.
Was reading about how junction temperature (Tj) measurements are done for a Power MOSFET under power cycling conditions.
As per my understanding, a thermal chamber is used to heat the entire DUT to a uniform temperature, after which a test current is passed through the DUT and the corresponding VDS is noted down. Essentially what we create is a table of VDS vs Temperature for all values of temperature.
Now when we wish to measure the Tj during power cycling, we note the VDS, compare it with our previous table and infer the Tj.
This makes sense to me so far, however I do not understand how a test current produces a voltage drop, in cases when the channel hasn't been formed yet. For example, when the DUT is being cooled, the VG applied is negative, so as to completely close the channel and prevent any conduction i.e. heating from occurring. In such a case for Tj measurement, how will a test current produce a voltage drop ? Does a power mosfet conduct small currents for VDS>0 even when the gate voltage is negative ?
Please feel free to correct my understanding of things and I would appreciate if someone could explain how we measure the VDS using a test current for a Power MOSFET
Just looking for a rudimentary explanation.
Was reading about how junction temperature (Tj) measurements are done for a Power MOSFET under power cycling conditions.
As per my understanding, a thermal chamber is used to heat the entire DUT to a uniform temperature, after which a test current is passed through the DUT and the corresponding VDS is noted down. Essentially what we create is a table of VDS vs Temperature for all values of temperature.
Now when we wish to measure the Tj during power cycling, we note the VDS, compare it with our previous table and infer the Tj.
This makes sense to me so far, however I do not understand how a test current produces a voltage drop, in cases when the channel hasn't been formed yet. For example, when the DUT is being cooled, the VG applied is negative, so as to completely close the channel and prevent any conduction i.e. heating from occurring. In such a case for Tj measurement, how will a test current produce a voltage drop ? Does a power mosfet conduct small currents for VDS>0 even when the gate voltage is negative ?
Please feel free to correct my understanding of things and I would appreciate if someone could explain how we measure the VDS using a test current for a Power MOSFET