Measurement of SRAM VTC (Voltage Transfer C.) with HSPICE

[fgomezp]

sram, hspice

Hi,

I am new to HSPICE and digital circuit design at transistor level. I am trying to generate the VTC (Voltage Transfer Characteristic) of a 6T SRAM cell. Here is my simulated netlist,

MM5 q q-comp vdd vdd PMOS W=6 L=2 GEO=0
MM1 q q-comp gnd gnd NMOS W=3 L=2 GEO=0
MM6 q-comp q vdd vdd PMOS W=6 L=2 GEO=0
MM2 q-comp q gnd gnd NMOS W=3 L=2 GEO=0
MM4 q-comp W b-comp Gnd NMOS W=3 L=2 GEO=0
MM3 b W q Gnd NMOS W=3 L=2 GEO=0

The best way I can think of is to stimulate the two bitlines (b and b-comp above) with a cycle of a triangle function an measure the output with a trans analysis. Now, I am not sure this is 100% correct as the VTC should be obtained through DC analysis. However, I don't know how to do a DC analysis that would give me the wanted VTC. Any help/hint would be really appreciated.

Thanks,

Fernando.

 

[Vamsi Mocherla]

vtc voltage

Well, to do a DC analysis. You can keep one of the inputs at VDD or GND. The other input voltge can be swept from 0 VDD and then plot the output. I am not sure this is what you are exactly looking for but I hope this helps.

In spice, you can write the DC deck

.DC VIN <initial value> <final value> <step size>

 

[lastdance]

Re: Measurement of SRAM VTC (Voltage Transfer C.) with HSPIC

a ramp in ms is as good as dc.
Hold wordline W high.
use a triangular signal at b. leave b-comp floating.