ronanchang
Junior Member level 2
I have completed the 1.5bit/stage in pipelined ADC,and I connected two of the stages together.Somehow I found that the first stage of the MDAC's output could reach 2Vin+(-)Vref but the second stage couldn't reach that level.Could someone give me some advices what is the problem about the phenomenon??
P.S. Vin signal is differential which means Vp-p is +0.6 to -0.6.Vrefp is 1.2 and Vrefn is 0.6.
P.S. Vin signal is differential which means Vp-p is +0.6 to -0.6.Vrefp is 1.2 and Vrefn is 0.6.