MCU's Crytal Accuracy Problem

Status
Not open for further replies.

eepty

Full Member level 2
Joined
Oct 21, 2005
Messages
143
Helped
2
Reputation
4
Reaction score
2
Trophy points
1,298
Visit site
Activity points
2,611
I am using a 32.768kHz crystal for a ARM M0+ MCU. According to the specification, the crystal tolerence is 20PPM, and the loading capacitance is 12.5pF. To match the loading capacitance, a capacitor is connected between each of the crystal's terminal and the ground. By calculation (considered the PCB and MCU stray capacitance), each of the capacitor is about 18pF ( 18pF = 2 x (12.5pF - Cstray) ).

For checking the accuracy, I make use of the MCU's timer periphral to generate a signal from the crystal and checking the frequency by a frequency counter. I found that the error is about 650PPM, which is much higher than my expectation. I tested it with different capacitor value but the result is similar. The ambient temperature when I test the crystal is at room temperature (~24C). I have also tested it with the integrated Real Time Clock (RTC) periphral, the result is similar. The RTC error is about 700PPM after two days.

I would like to ask is it normal that the actual error is so high for using a 20PPM crystal? If not, what is the possible reason for that?

Thank you very much.
 


Your finding is the reason why capacitor trimmer is used to ACCURATELY set the frequency using a calibrated counter. This trimmer can also be specified for temperature drift, to compensate other than crystal contributions.

All this explains why really accurate and stabilized frequency generators are so expensive.
Frequency drifts have to be observed over time, and the pyramid method is used to select the best unit of say up to one hundred. Worse units are thrown out or used in less demanding applications.

- - - Updated - - -

BTW, with your frequency, the trimmer can be seen in any wrist watch for exactly the above reason.
 

No regular crystal can be pulled 650 ppm by a small load capacitance mismatch. Expectable frequency offsets are a few 10 ppm maximal.
 
Reactions: eepty

    eepty

    Points: 2
    Helpful Answer Positive Rating
No regular crystal can be pulled 650 ppm by a small load capacitance mismatch. Expectable frequency offsets are a few 10 ppm maximal.

True. In my testing I can only change several PPM by using different loading capactors. However is it normal that the error is so high (~650PPM) when I use a 20PPM crystal for a ARM M0+ MCU? (I mainly use the crystal for the real time clock).

- - - Updated - - -


However, I have tested it with different capcitance value but the result is similar. I can only improve the error by several PPM.
 

However is it normal that the error is so high (~650PPM) when I use a 20PPM crystal for a ARM M0+ MCU?
No. Either a defective crystal or some weird software error.
 
Reactions: eepty

    eepty

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Similar threads

Cookies are required to use this site. You must accept them to continue using the site. Learn more…