CMOS RF switches tend to use stacked devices on SOI
to get high power handling and linearity. I would not
expect more than about 1.2V nominal DC rating, maybe
1.3-ish DC max. What kind of AC "bonus" you can claim
would depend a lot on how the device behaves at the
limits - linearity matters, isolation matters, in addition
to simple reliability (which wants RF HTOL testing to
determine, and this is unlikely to be found in "digital"
process collateral - you might however deduce some
things from some RF-CMOS foundry documentation
(if they were sharing it with you - they tend to want
a relationship established) or publications from RF
conferences.
You would not likely use PMOS in the RF path of a
RF switch, unless your idea of RF is well below 1GHz
or you anticipate a DC pedestal that requires more
than a NMOS element can give you. For area, NMOS
always wins and for symmetric ground referred RF
signals, NMOS suffices.