There is quite a bit to properly designing a board for ADC or DAC. I'll share a few thoughts, but to do the subject justice you should do some reading.
Digital signal leading and trailing edges are broadband high energy sources, and AD/DA analog signals are low energy narrow band signals. The two should NEVER get close to one another. Clock signals tend to have the fastest and highest edges on a digital board, therefore are some of the greatest sources of broadband "noise".
All signals are loops; that is, all signal traces have a corresponding return path that will seek the shortest distance between source and sink. That is why all well designed circuits with ADC or DAC use unbroken, continuous, reference planes under all signal paths. The lowest energy signal return path will be through the reference plane directly under the signal trace. Nature demands that signals follow the path requiring the least amount of energy.
The use of unbroken reference planes also provides the means by which to control impedance (usually 50ohms for digital signals). Controlled impedance maximizes the transfer of energy from source to sink, and minimizes reflections and radiation. Both reflections and radiation from digital signal edges can be noise sources.
You need to keep the reference plane (usually ground) segregated so that the analog signals and digital signals do not run over the same parts of the plane. When you route the converter input and output traces, they should be grouped and routed such that analog and digital don't parallel one another, and they are over different portions of the reference plane.
Likewise, analog outputs or inputs on the same layers as other digital traces (such as clocks) should be physically separated by at least 3x (rough rule of thumb) the trace width from the digital traces to minimize cross coupling. Some people use guard traces; however, they are unnecessary, and simply take up room. Physical separation does a better job in most cases.
In addition to the above, ADC and DAC power supplies must be kept clean. That means sufficient decoupling capacitors to provide a constant voltage source under all signal conditions. A decoupling capacitor is nothing more than an "electron bucket" that supplies extra electrons when there is a sudden spike in the power supply demand - such as those caused by digital signal edges. Those "buckets" need to be close to the power pins to avoid any delay in getting the extra electrons to their destination. They also have to be selected for size to keep the RC time constant low, or even though they're physically close, it will take too long for them to deliver their charge.
There are many good references in manufacturer's application notes, and elsewhere on the web. Try Googling things like "digital analog layout" or "mixed signal layout".