Maximum output swing for Common Emitter Amplifier

Hi,

I need a little help regarding understanding involved in calculating Peak-Peak output swing of a common emitter amplifier that can be achieved without clipping/distortion.

I have attached the circuit that I am using for your kind reference and also listing the calculations I have done

I have two questions. Please help

1. By varying Resistance across Emitter (RE2) I am able to get the desired voltage gain. But if I increase the input voltage above a limit then the distortion occurs or clipping occurs. How to find that limit? Any general concept here?

2. My understanding is that once I get quiescent values ie IQ and VCEQ I know that the output voltage waveform will swing about VCEQ depending upon the gain.
In this case I have calculated VCEQ as 4.08V. The AC gain expected is RC/RE = 3(approx). The AC swing that I get perfectly matched this value but the DC value that I see is around 7.2V Why is this?

Refer the diagram showing output voltage directly across collector of transistor. (Note: Taking output across load resistance will only show AC value as the Coupling Capacitors to separate the AC signals from the DC bias).


Any help is appreciated.
-Hemanshu

You have calculated Vce but plotted Vcollector. Vce = 4.08V is roughly correctt but there is 3.3V across the emitter resistors so the collector voltage is 3.3+4.08V. Or more simply

Vcollector = Vcc - Ic.Rc

Keith.

Hey keith

Thanks.. yes you are correct, I was seeing the output wrt to ground and forgot to take the effect of Emitter drop. Now this part is ok..

Regarding my peak to peak swing question.. could you please help...

I think I have found the solution..requesting somebody to please confirm!

Once Q point is found, take the ICQ value and IC sat value. compare them and see which of the following is less-> Difference between ICQ and IC sat value or ICQ value and 0 ( corresponds to x axis point on load line with VCE=VCC)
In my case ICQ = 2.64mA and ICsat = 4mA. Thus we find that difference between them ie 1.36mA is less than difference between ICQ(2.64mA) and 0.
So my design can take an extra swing of 1.36mA in collector current. but we also need to be sure that we do not go below VCE =0.2 V the saturation voltage of VCE.

Lets choose a safe VCE=0.7V ( the minimum we have decided to go) and calculate the corresponding IC value putting them in load line.
(12-.7)/3K =3.7666mA

Now the maximum swing we can take is 1.12mA or base swing as 6.25uA. The maximum base current would correspond to maximum base voltage. So maximum base current is 14.69uA+ 6.25uA = 20.925uA We are now adding a AC source for this additional base current that the design can faithfully amplify. Let this voltage be Vext

Using the initial equation for calculating base current
Ib = (4+Vext-0.7)/(7.33 +181*1.2)k where Ib is 20.925uA so Vext =1.398V
I checked with this source 1.4V (sin) and I get faithful amplification. If I try to go above it say around 2V I get clipped waveform.
So I think once we decide the Q point location and the desired swing(considering all factors/requirments) we can calculate how much input AC voltage the system can faithfully amplify.
hey just wanted to know if the math I came up with sounds logical..

Thanks a lot for the support!

Hemanshu

I must admit I do a lot less maths to design such things. Looking at it simply, the base voltage is 1/3 of Vcc so 4V. The emitter is 0.7V below that so 3.3V. So maximum swing would be when the collector is halfway between 3.3V and 12V so 7.65V - in reality a little higher due to Vsat, say 7.7V.

In practice, I am not often trying to get maximum swing - there are other things to get right.

Keith.

Thanks keith for your guidance...
-Hemanshu