If you want on-chip-only, you will have to be switching
at tens to hundreds of MHz. I embed decoupling as an
opportunistic thing but never let it drive die size. The
energy storage density is generally poor (either the
voltage and Q are low (using MOSFET gates) or the
specific capacitance is (metal plates). But if the area
under the power busses is free, then fill it.
I have seen hundreds of pF in poly/metal/metal on
one large-ish mostly-digital design, and nanofarad-
range Cdg in 1A DC-DC output FETs (most of a die
of roughly the size you speak of).