MAX7000 Global assigment in VHDL??

max7000 series and vhdl

Dear All,

I would like to know how to make a global assigment of an internal logic to a global routing signal resource. For example, I have nRST that goes throught a two D flip-flop synchronizer and becomes nGRST. I would like that this nGRST would use global routing, (1) how to do that in Altera QII (MAX7000)?. Also I have another signal nDS that I pass through two D flip-flops sinchronizer. I would like also to connect the nGDS to a global routing resource.

In the two series D flip-flops synchronizers, (2) should I connect the preset/reset signals of the D Flip-Flops to the nGRST, to the nRST or to nothing?.

(3) when a CPLD max7000 powers-up, which is the initial state of the outputs of the D flip-flops??

(4) the Max7000 architecture has a global routing resource for the nCLR of the D flipflops, if in my design I use:

if (nRST = '0') then
then Q <= '1'; -- instead of Q<= '0'
...

this mean that I use the preset of the D flip-flops and not the nCLR, doesn't it? Then, I can't use the global routing for the preset??.

Sorry for these many questions but I am trying to fill my fogs.

Thanks a lot and best regards,

mimoto