I'm interested in your opinion in this interesting matter I'm discussing with my friends.
For a deep submicron technology, in analog layout, what metals would you prefer to route a matching structure?
Would you go for the higher metals which offer the lower capacitance(but could induce mechanical stress because of the multiple via over the drain or source diffusion), or route with lower metals?
Do you usually route using simmetrical metal structures over the active gate? Because in the end it will be metal filled anyway and may affect the matching even worse than simmetrical routing.
Any experienced analog deep micron layouters out there?
The influeance of metal coverage for drain current mismatch is quiet high, so its good practice to not using lower metals over the gate. Its two reason for this:
1. any metal path over a gate modifying an electric field on transistor,
2. degradation of gate during fabrication process at metal etching.
Of course if You haven't choice and have to provide metal path over an active area do it only with higher metals.