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Manufacturing Tolerances of Capacitor Voltage Linearity Tolerance

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[revised]
[just noticed my title is redundant, but i can't edit it :D

In my application, voltage tolerance between capacitors is critical. This concerns manufacturing tolerances of voltage linearity and drop:
  • Vdrop tolerance compensation ideas:
  • Increase capacitance to reduce voltage drop. Vdrop = Q ÷ C, where Q is charge in coulombs, C is capacitance in farads. Thus, variation in Vdrop is determined capacitor tolerance rating. You can halve Vdrop by doubling capacitance.
  • Trim Vdrop of an active diode during board assembly.
  • Linearity tolerance compensation ideas:
  • How to determine the manufacturing tolerance of linearity? I'm guessing this may be related to variation in ESR with changes in voltage and temperature.
  • Parallel the caps to improve linearity. This technique may suffer diminishing returns.
  • Do nothing. Linearity tolerance between film caps is better than 0.5% consistent. Is this true?
  • Other methods?
 
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What is your %C tolerance voltage range and temperature requirements? Explain the application.
Ideal caps are linear devices meaning the derivative sensitivity is zero, also Ic=CdV/dt is precise regardless of V within the limits ajd C is constant over Temp and Vdc.

I recall experiencing in the late '70s that high Dk ceramics also have a bad hysteresis effect in ADC S/H caps just like the memory effect in large electrolytic e-caps and batteries where the voltage returns slowly after a brief short circuit.


Some people think all caps are linear devices, but they are not. It is just some materials are better than others. It is not simply a manufacturing tolerance issue.
Yet no caps are ideal and the common characteristic of non-linearity is DC bias sensitivity and thermal sensitivity both found in devices with high Dk dielectric.

The opposite is true for low Dk components such as NP0/C0G ceramic and all film capacitors, which are closer to ideal. However, film caps like epoxy FR4 have a 10% typical tolerance on Dk so lower tolerance parts come by 100% electrical test and sorting.
 
I have two identical circuits in series, using caps for DC isolation. Feeding the circuit with AC. Assuming the load resistances are identical, I require the AC voltages on both loads to be identical, within less than 1% tolerance.

1728912772936.png


Correct me if I'm wrong I think this is all about ESR in the caps. A difference in ESR will cause a different voltage on the load.

1728913290585.png


What's the tolerance of ESR? A cap that i'm looking at has ESR max of 7 mΩ. How much will that vary, cap to cap, due to manufacturing tolerances?
 
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If you compute impedance (f) for each RC you should expect manufacturing tolerances from each batch and date code as well as environmental stress from dV/dt, temperature, humidity, aging and also C tolerances from the winding forces on metal film changing the gaps between dielectric and the Dk tolerances.

There are no specs for your circuit stress but assuming they share this the differential may be quite small.

The biggest change in ESR is due to rising frequency which you expect if no other resistance is added and you are driving with an ideal voltage source with 0 Ohms using a square wave. The current will thus be 1/2 of Vpp / ESR = Ipk with two caps in series. The more R added to the driver, the less Ipk and less stress on the caps. Pwr dissipation in the ESR if > 1MHz and high voltage will cause internal heat stress, which raises ESR in one part slightly higher than the other and so ages faster. Yet there are no published specs. You may have to search Google Scholar for research papers on metal film caps and how they process or acid etch the metal film to increase the surface area and lower ESR.

This exactly happens to 12V car batteries and multi-cell Lithium Ion arrays. A dead battery is always caused by the weakest cells which are made to be identical with 0.1% if I estimate the tolerances. Using std. Lithium Ion batteries from 100% to 0% to 100% within the C ratings one will find that this causes it accelerates the ESR mismatch. I recall Battery University showed > 10 times more charge cycles 500 rising to 5000 cycles than if you used only 50% of the stored charge from 80% to 30% or 90% to 40% avoiding the < 20% and > 90% higher stress conditions on Li-Ion batteries Vf> 3.7. (This is also why the CV mode must be time-limited usually cutoff by <5% of the CC mode) Yet drone battery users are too impatient to keep swapping batteries and want to extend the very short operating times to save on the costs of battery replacements. Yet having 2 packs used at 50% capacity reduction per cycle gives you 10 times the MTBF.

Lead Acid batteries rise in ESR due to sulphation at low charge and high temperatures, so car batteries only last 5 or 6 yrs because the alternators are ideally set to 14.2V to burn off the sulphate oxide rust to keep the CCA high or ESR low. Fortunately, metal film and C0G/NP0 ceramic caps do not have these severe problems. yet they will have other tolerances and environmental stresses unspecified.

So tell us why you must have this balance and then we'll tell you a better way to do
this using matched parallel resistors smaller than the expected aging leakage R to operate like a BMS for batteries. After all, batteries are just ultra-big electrolytic capacitors (e.g. 10kF per cell) with a very strong acid or base chemical Vt cell threshold voltage. Actually, many equivalent C+ESRs are in parallel for each cell due to double electric layer effects. The Tau=C*ESR values are different and this causes the memory or hysteresis effect after a quick short just like old UHV TV caps. But metal film being much lower Dk or density dielectrics do not appear to have these characteristics but could at a much lower level.
 
I don't see the problem related to ESR. At 40 Hz operation frequency, capacitance tolerance is the only relevant parameter variation. As specified in R76 datasheet, smallest available tolerance is +/- 2.5 %.
 
I'm not using R's and C's to represent battery cells. The C's are caps, the R's represent ESR.

I understand the effects of aging, frequency, and temperature on ESR. The question is whether C's of the same part number will be affected the same.

I don't see the problem related to ESR. At 40 Hz operation frequency, capacitance tolerance is the only relevant parameter variation. As specified in R76 datasheet, smallest available tolerance is +/- 2.5 %.
From what i understand, ESR is unrelated to capacitance. Are you saying capacitance determines voltage difference at each capacitor?
 
Last edited:
[revised]
[just noticed my title is redundant, but i can't edit it :D

In my application, voltage tolerance between capacitors is critical. This concerns manufacturing tolerances of voltage linearity and drop:
  • Vdrop tolerance compensation ideas:
  • Increase capacitance to reduce voltage drop. Vdrop = Q ÷ C, where Q is charge in coulombs, C is capacitance in farads. Thus, variation in Vdrop is determined capacitor tolerance rating. You can halve Vdrop by doubling capacitance.
  • Trim Vdrop of an active diode during board assembly.
  • Linearity tolerance compensation ideas:
  • How to determine the manufacturing tolerance of linearity? I'm guessing this may be related to variation in ESR with changes in voltage and temperature.
  • Parallel the caps to improve linearity. This technique may suffer diminishing returns.
  • Do nothing. Linearity tolerance between film caps is better than 0.5% consistent. Is this true?
  • Other methods?
We don't call it "linearity tolerance", rather, just "tolerance" on the absolute value.
There are NO tolerances on ESR just maximum values (new)

I suspect your problem is trying to null a balanced load with a grounded source and unbalanced source impedance.

I think this simulation better shows your hypothetical problem.


ESR*C tends to be constant for a given family and package size, so ESR reduces for larger C values.
 

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