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Good luck with this.

I recommend to do some reasearch about how a PLL and how (different) phase detectors and how it´s feedback loop works.


From your math.

it seems you don´t understand

* that even if both frequencies are 100% equal .. there still may be a 36° deviation.

* that 0.5us ... may mean 36° leading ... or 36° lagging.

* 36° of phase misalignement ... have nothing to do with 36kHz at all.

* you can have 0.5us phase difference with a wide range of frequencies. Let´s say 200kHz reference and 100kHz ... 400kHz output frequency.


You may use paper and pencil ... or a simulation tool ... or even Excel to verify your idea.


****

Let´s do an example:

* 200kHz reference and 220kHz PWM frequency, starting at the same time.

--> do you agree you have to correct the frequency by -20kHz? ... I mean to get 200kHz which is in first place necessay to become synchronized.


After 5us you get a phase difference of 0.5us

after another 5us --> =10us you get a phase difference of 1us

15us --- 1.5us

20us --- 2.0us

25us --- ALL HIGH

30us --- 2.0us

35us --- 1.5us

40us --- 1.0us

45us --- 0.5us

50us --- ALL LOW


And in all these cases above

... with all the phase differences of 0us to 2.5us  (it does not go beyond 2.5us)

 ... you always need to correct the frequency by -20kHz.

Since it´s always 200kHz vs 220kHz.


Klaus


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