making rising wave to logic 1

[ss]

I have made circuit of FSK and PLL using XR2206 and RC2211, now there are some problems in the output of PLL at high baudrates. The problem is that it is giving logic 0 for logic0 but for logic1 it gives rising wave like capacitor being charged. Is there any meathod to make this rising wave a strainght logic 1 level. Baudrate i am using is 128000 (serial port).

waiting for positive reply

 

[nand_gates]

Use schimmit trigger buffer for this at the o/p of pll.

 

[electronics_kumar]

in analog ,power amplifier will be the last stage before load
in digital,schmitt trigger is the nice option as last stage before load
it is will produce perfect square wave