dw_man
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I have a small design which includes a macro RAM block and am trying to perform the Place and Route in IC Compiler. Is there any particular guidelines that I need to follow. I create a floorplan and then fix the RAM macro which seems to be required before doing the placement.
When I perform routing using route_zrt, I am getting DRC violations relating to Over max stack level referring to vias. These seem to be coming from the I/O of the macro. How can I recify this, or what is specifically causing this problem. Is there a setting or a command that I need to perform to avoid this?
Thanks.
When I perform routing using route_zrt, I am getting DRC violations relating to Over max stack level referring to vias. These seem to be coming from the I/O of the macro. How can I recify this, or what is specifically causing this problem. Is there a setting or a command that I need to perform to avoid this?
Thanks.