LVS question for the inverter without source connection

Status
Not open for further replies.
L

littlej_zju

Member level 2
Joined
Dec 5, 2006
Messages
44
Helped
6
Reputation
12
Reaction score
4
Trophy points
1,288
Visit site
Activity points
1,491
For below test case (inverter), the source of PMOS/NMOS don’t connect to power/ground through metal1, just by pickup.
But, from lvs check, source side of PMOS/NMOS show AVDD/AVSS. It seems un-reasonable.
How can I check such case?
 

Just put metal1 pins AVDD resp. AVSS over the metal1 source connections; repeat extraction & LVS.
 

littlej_zju said:
Why will lvs still extracted AVDD/AVSS in source side?
Click to expand...

This is a misunderstanding, I think: the extract tool doesn't assign any pin names, if they don't exist. Your schematic, however, owns these pin names, so the LVS can't succeed without assigning the corresponding pin names on the layout.

Either remove the AVDD/AVSS pins from the schematic, or add them to the layout, as suggested above.
You may use any pin names, but they should correspond on schematic and layout.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…