LVS error. sincerely asking for your help.

[sophiefans]

divalvs.rul

Dear all
I am a fresh man on layout design. I met some questions which confusing me a lot when doing lvs . Sincerely asking for your help .thanks



Question 1:
——————————————————————————————————————————
I /R4
? Combined device:Err:Sch Res missing params:L;Lay Res missing params:L
I /R5
? Combined device:Err:Sch Res missing params:L;Lay Res missing params:L
I /R6
? Combined device:Err:Sch Res missing params:L;Lay Res missing params:L
——————————————————————————————————————————
What's wrong with it? The params "L" were all given in both layout&schematic. But when lvs, Diva told me the Err message above.


Question 2:
in Cadence-Composer
resistorA(w=700n,L=35u) the resistanceA=9.33957 K(ohms)
but,
resistorB(w=700n,L=70u) the resistanceB=17.82690 K(ohms)

Why the resistanceB is not equal to resistanceA*2?


thank you.

 

[sankudey]

diva option series resistor

Hi,

1. Some times ODD things come-up in view. U may do one thing. Compose a fresh schematic where u have just thoise resistance. But put them by taking it from library. (Avoid copy and paste). Then u do the layout of the same. And chek DRC/LVS for the newly composed circuit.

2. Ur second question pertain to ur techfile and modeling. But u can see the value is very close to *2. Some edge effects or terminal resistance may be in effect which is being taken care in models.

gd lk in LVS....
sankudey

 

[leeenghan]

sample divalvs.rul

Hi,

For (2), please refer to the tech file on how the resistance is calculate. For example, there might be some consideration for the resistance of the contacts.

Regards,
Eng Han
www.eda-utilities.com

 

[sophiefans]

Hi sankudey,

I have redone the layout&schmatic by using the resistors from library. But the same error existed. I drow a simple circuit with resistors for test. When I used one resistor in both schmamtic&layout, LVS passed. But when I used two seresistors connected in series to take place the one in layout.Diva sent me the same error message bellow:
"I /R1
? Combined device:Err:Sch Res L/W/m 1.4e-05 7e-07 1;Lay Res missing params:L
I /R2
? Combined device:Err:Sch Res L/W/m 1.4e-05 7e-07 1;Lay Res missing params:L
"

So,now I am doubting if the divalvs.rul is right. Do you have any other advise?

 

[Hughes]

You should check the divaLVS.rul. May be the permute rule for resistors doesn't contain a combine function. If the permute rule is:
permuteDevice(series "res")
it should be modified to
permuteDevice(series "res" seriesRes)
May be your rule file doesn't contain the function seriesRes. You should define the function in divaLVS.rul file.

 

[mqc_hn]

I suggest you check the part about resistor definition in lvs command file.
BTW, I don't know if you turn on some options(such as LVS REDUCE SERIES RESISTORS, etc..).

 

[sophiefans]

parts of divaLVS.rul are listed bellow:

"; Permute series RESISTOR devices
permuteDevice( series "rnwell_res" seriesRES )
permuteDevice( series "rndiff_res" seriesRES )
permuteDevice( series "rpdiff_res" seriesRES )
permuteDevice( series "rpl_res" seriesRES )
permuteDevice( series "r1k_res" seriesRES )
permuteDevice( series "rm1" seriesRES )

…………………………………………………………………………

; *****************************************************************
; combine series resistors
; *****************************************************************

……………………………………………………………………………

; combine parameters

R1m = R1/M1
R2m = R2/M2
newW = W1
newR = R1m + R2m
serRes->w = newW
serRes->r = newR
serRes->m = float( 1 )

printf( "\n" )
printf( "** Series resistors combined: \n" )
printf(" 1st device: W = %g R = %g \n" W1 R1 )
printf(" 2nd device: W = %g R = %g \n" W2 R2 )
printf(" Resulting: W = %g R = %g \n" newW newR )
return(serRes)
) ;prog
) ;procedure( seriesRES )
"

It seems that the rule doesn't define the newL of the combined seriesRES.Is this wrong?

 

[Hughes]

It seems that the rule doesn't define the newL of the combined seriesRES.Is this wrong?

Yes. This is the problem.

 

[sophiefans]

But, The diva.LVS comes from Cadence. I think it should be perfect. Because it is important for the users. Why cadence has such a low level mistake? And, how to modify it ?

 

[Hughes]

The rule file from Cadence is just for demo. It isn't perfect. For example, when treating parallel mosfet, it calculates the length of the combined devices by averaging the lengths of the original devices. Imaging a mosfet with w/l=10/2 paralleled with a mosfet with w/l=5/1!

 

[sophiefans]

The rule file from Cadence is just for demo. It isn't perfect. For example, when treating parallel mosfet, it calculates the length of the combined devices by averaging the lengths of the original devices. Imaging a mosfet with w/l=10/2 paralleled with a mosfet with w/l=5/1!

I think i am coming to know the truth. The truth is that the divaLVS.rul is not perfect in fact. In this case, the DRC.rul&EXT.rul should also be suspceted. Isn't it? Then,is there someone warm-hearted could send me some manuel about writing *.rul files? Thanks a lot.

 

[Hughes]

Although the examples are not perfect, but the documents about how to write rule files are useful. You can refer to the diva user guide and diva reference.

 

[sophiefans]

Hi everyone, I have solved the problem by adding the combined param "newL" to divaLVS.rul. But now i met some other questions.

question1:
A resistor(w=700n,L=70u)which the resistance is 17.82690K(ohms) in composer, i use two resistors(w=700n,L1+L2=70u) connected in series to take place in layout, but the total resistance of the two resistors is 9.33957*2=18.67914K(ohms) not equal to 17.82690K(ohms). I just want to know which param should be compared in divaLVS.rul, the params"L" or "resistance" ?

question2:
A pmos which the "source" and "back gate" connect together in layout. But after extracted, i got a pmos that the "drain" and "back gate" connect together. How could i distinguish "source" or "drain" in layout? OR it doesn't matter?

 

[Hughes]

question1:
A resistor(w=700n,L=70u)which the resistance is 17.82690K(ohms) in composer, i use two resistors(w=700n,L1+L2=70u) connected in series to take place in layout, but the total resistance of the two resistors is 9.33957*2=18.67914K(ohms) not equal to 17.82690K(ohms). I just want to know which param should be compared in divaLVS.rul, the params"L" or "resistance" ?

In general, "resistance" is more important than "L". For critical circuits, "W" and "L" are important too (they can't be too small). Matched resistors should have the same "W" and "L" for each unit.

question2:
A pmos which the "source" and "back gate" connect together in layout. But after extracted, i got a pmos that the "drain" and "back gate" connect together. How could i distinguish "source" or "drain" in layout? OR it doesn't matter?

It doesn't matter. In a four-terminal mosfet, source and drain are switchable.

 

[sophiefans]

In general, "resistance" is more important than "L". For critical circuits, "W" and "L" are important too (they can't be too small). Matched resistors should have the same "W" and "L" for each unit.

About question1: My divaLVS.rul defines "L" as the params to be compared. Then, as your mean, could i modify it to compare resistors by params "resistance"? These details are important for me. Thanks a lot for the answer of question2.

 

[Hughes]

I think you can modify it to compare resistance or resistance and W.
If W and L are important parameters, you can comment out the permute rule for resistors. When a resistor is divided to two resistors, divide it in schematic also.