ashwatik
Newbie level 3
I have a problem with LVS errors, I am not able to figure out what might be wrong here. I have split a 16 gate transistor into 8 + * (in the AMS process, you don't have multiplicity, only number of gates). For some reason, there are 4 transistors that do not get recognized in the layout. I am not sure why at all. I have attached the LVS error report here:
View attachment ams-lvs-error.txt
I use Layout XL and I have tried "Update Nets and Components", I have deleted those four parts and created them again. The schematic is 4 transistors in parallel with each transistor having 4 gates (I needed to use a common centroid layout).
I would really appreciate some insight into the problem, as soon as possible.
View attachment ams-lvs-error.txt
I use Layout XL and I have tried "Update Nets and Components", I have deleted those four parts and created them again. The schematic is 4 transistors in parallel with each transistor having 4 gates (I needed to use a common centroid layout).
I would really appreciate some insight into the problem, as soon as possible.