snaku
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Hi All,
In our design, we have an ADC which gives out differential parallel outputs.The ADC operates at 3.3V. The differential output is interfaced to FPGA, which operates at 2.5V.
Is it necessary that both transmitter and receiver should be at the same voltage levels?
Thanks & Regards,
Naveen
In our design, we have an ADC which gives out differential parallel outputs.The ADC operates at 3.3V. The differential output is interfaced to FPGA, which operates at 2.5V.
Is it necessary that both transmitter and receiver should be at the same voltage levels?
Thanks & Regards,
Naveen