LVDS I/O in ASICs - fairly normal requirement

[siskin]

I am just about to start an ASIC design, probably targetting TSMC 90nm.

I need some of my inputs to be LVDS, which seems like a fairly normal requirement to me, but there don't seem to be any LVDS I/O buffers in the standard vendor libraries!

Having a browse on the web, I can only seem to find specialist companies who sell LVDS IP.
I'm used to FPGAs, where I can freely choose CMOS, LVDS, LVPECL, SSTL, etc. I had assumed that in the ASIC world there would be a choice at least as comprehensive.
I'm totally shocked by this - am I just not looking in the right place, or is LVDS considered to be a very specialised piece of IP?

Many thanks,
Siskin

 

[johanlo]

Re: LVDS I/O in ASICs

LVDS is pretty analog stuff, and you are _usually_ not able to mix analog and digital design when doing layout. I believe LVDS modules can be bought from companies designing analog I/O.

What is the more practical solution is to use a simulation model for LVDS when you stitch your system together. When you do the layout you may use "black boxes", e.g. Synopsys FRAM views, and logic models, e.g. dotlibs to interface the LVDS I/O.

I have only done digital layouts using Synopsys IC Compiler and been touching Cadence SOC Encounter, so the description is how I believe it is done.

 

[ljxpjpjljx]

Re: LVDS I/O in ASICs

we use the LVDS IP from smic!