LTSPICE NMOS C-V curve plot

eelearner_ss said:

How to plot a c-v curve in ltspice? thanks

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Dear eelearner_ss,

As with any other analog simulator, one can perform a series of small-signal AC simulations with the voltage across the voltage-capacitance element varying from the minimum to the maximum voltage over which are interested in the capacitance value. Perform each AC simulation over the frequency range for which you want to determine the capacitance (for example, if you want to measure the C-V characteristic at 1 MHz, 10 MHz, and 100 MHz, make sure your AC simulations contain these frequencies). Each AC simulation is set up to measure the input impedance of the voltage varying element. Depending on the simulator type and analog elements it provides, you may need to isolate the DC voltage applied to the voltage varying element from the AC source driving the element with a very large inductor or an AC resistor (resistor component for simulator that provides an AC value and a separate DC value).

For each DC voltage, measure the effective input capacitance by determining the imaginary part of the input impedance at the frequency you want to to measure the C-V characteristic from each AC result. This will provide the capacitance at a given frequency for each of your DC voltages from which you can construct the C-V characteristic.

I hope this provides the information you were hoping to find!
Shawn

thank you advice very much. my solution now is to calculate d(Vgs)/dt,so i can use C(Vgs)=I(g)/((d(Vgs)/dt)),so how can i calculate d(Vgs)/dt in ltspice,if you have any ideas ,thank you.

If the leakage current is negligible, C-V curve can be directly recorded and plotted in transient analysis by applying a linear voltage ramp, see https://groups.io/g/LTspice/topic/50198439