If I undestood the Stratix/Cyclone spec correctly, a compressed bitstream can be stored in the serial device to use less storage.
When the board powers up, the bitstream is decompressed by the FPGA?Am I correct?
Then if I want to store my bitstream in a non-@lter@ serial device, there should be no problem. What is strange to me is how the fpga can stand receiving continuous bitstream while it is decompressing the current data in the fpga.
On the other hand, if the bitstream is uncompressed in @lter@'s serial device, then the fpga sees no difference since the data is uncompressed. However, I can't store the bitstream in a non-@lter@ serial device.
Anybody has the decompression algo? Maybe I could decompress using another fpga/cpld that is on-board. I want to save cost since config device for Stratix is expensive.
Thanks for any thoughts...