Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

LT6231 - Exposed copper pad

Status
Not open for further replies.

ElecDesigner

Member level 5
Member level 5
Joined
Jul 22, 2014
Messages
94
Helped
4
Reputation
8
Reaction score
5
Trophy points
1,288
Visit site
Activity points
2,190
I have a board that was designed by someone else but it never worked and the designed left the company. Its basically a bunch of opamp circuits and I have narrowed the problem down to a 1.8V negative bias on a LT6231 op-amp.
The op amp is supplied by +5/-5V rails.

One strange thing I notice is that the exposed copper pad has been connected to mid rail (ground) on the PCB. In the datasheet for the part it indicates that the pad is connected to V- internally. Its clearly not however, as the combined effect of the chip and PCB would cause a direct short between -5V and ground.

http://cds.linear.com/docs/en/datasheet/623012fc.pdf

However does anything have any thoughts as to if this misconnection on the PCB (thermal pad to GND instead of -5V) might cause the offset I am seeing.
 

The datasheet information may be incomplete, or the chip design may have changed. If the exposed pad is electrically connected internally, it will be connected to the chip substrate, which is either directly tied to V- or floating. In the latter case, applying a voltage above V- can cause additional leakage currents to arbitrary chip nodes, and possibly increased offset.

In any case, you should follow the latest datasheet suggestion. I know of other manufacturer's OPs that got the exposed pad connection specification silently changed many years after initial release.
 
In the latter case, applying a voltage above V- can cause additional leakage currents to arbitrary chip nodes, and possibly increased offset.

Maybe this is what is happening. Its virtually impossible to disconnect the pad from Ground on the current (populated) PCB....
 

Hi,

Maybe the internal connection is burnt out at the very first power up of the OPAMP.
--> recommend to follow the datsheet and connect it to V-.

Offset:
Can be caused by high source resistance and high leakage currents.
High leakage currents can be caused by humidity, flux residuals, bad PCB base material, dirt (even if not visible, like metal dust from an arcing contact, or a burnt wire)

Klaus
 
Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top