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[SOLVED] LPC2148 Analog Digital converter question

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Slay78

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Hello all,
First of all my AD converter on LPC2148 (dev MCB2140, JTAG ULINK2) works fine when i set CLKS=000 (11clock/10bit) in AD0CR register. I get also the result of AD conversion of 10bit (value from 0 to 1023) in AD0DR register, and that's ok.

The problem:
When i set CLKS=111 (setting the AD to 4clock/3bit) i expect my result in AD0DR to be 3 bit long (?), and a result from AD conversion in range 0 to 7? But that's not happening, in debugger i run and stop debugging and i read the values from Peripherials/ADConverter which i previously set and everything seems fine exept the value from edit box V/Vref=0x03FF.

So if my conversion is 3bit long, for some reason i get 10bit result, instead 3bit? Why is that? Should my value in V/Vref be just 0x0007 since is 3bit conv.

Thanks
 

You should mask the upper 7bits (which are garbage) and only care for the valid 3bits when your accuracy is set for 3bits.

CLKS: This field selects the number of clocks used for each conversion in Burst mode, and the
number of bits of accuracy of the result in the LS bits of ADDR, between 11 clocks
(10 bits) and 4 clocks (3 bits).

Note that this setting is only valid in burst mode, in normal mode the accuracy is 10bit
 

I set BURST=1, and i get some result but not yet as i expect. One more question, i need to mask upper 7 bits with 0x000001C0, so my result will be on 6,7,8 bit ?

Thanks for answer.
 


Here is what i try, potentiometer is controling which LED will be turned on. The reason why i want to use 3 bit ADC is because i have 8 LED's and 2^3=8 states from ADC. After setting BURST=1 the problem is the same.

It is interesting readings from debugger. With this code i get OVERRUN=1 for some reason, and V/Vref=0x0380 (=896). The value of 896=1023-127! Well my best guess is that result bits for 3bit conversion is not on positon 6,7,8. Please geve me your opinion. Thanks

Code:
#include <LPC214x.h>

void init_clock()
{ 
//fosc=12MHz
PLL0CFG=0x23;	//MSEL=4, PSEL=2
PLL0CON=0x01;	//Enable PLL  
PLL0FEED=0x55;	//update register PLLCFG
PLL0FEED=0xAA;	//update register PLLCON
while(!(PLL0STAT&0x00000400)); 	//check LOCK bit
PLL0CON=0x00000003;		//if LOCK=1 than connect
PLL0FEED=0x55;			//update register PLLCFG
PLL0FEED=0xAA;			//update register PLLCON
VPBDIV=0x01; 			//PCLK=CCLK
}

int main (void) {
int value;
int result;
	 
init_clock();			
PINSEL1	=0x01000000;	//pin P0.28 is AD1 convertor
IODIR1	=0x00FF0000;	//P1.16 - P1.23 output LED
IOCLR1	=0x00FF0000;	//LEDs off initialy
AD0CR=0x002F1302;	//AD0.1, 3MHz, 3bit

while(1){
AD0CR=AD0CR|0x01000000;  //Start ADC, START=001;
while ((AD0DR1 & 0x80000000) == 0); //wait until ADC is done

AD0CR &= ~0x01000000; 			//stop ADC, START=000;
IOCLR1 = 0x00FF0000; 			//LEDs off
	 
value = AD0DR1 & 0x000001C0;	//take result, bits 6,7 and 8
result = value >> 6;					
	 
	 
if(result == 0)
 IOSET1 = 1 << 16; 
else if(result == 1)
IOSET1 = 1 << 17;
else if(result == 2)
IOSET1 = 1 << 18;
else if(result == 3)
IOSET1 = 1 << 19;
else if(result == 4)
IOSET1 = 1 << 20;
else if(result == 5)
IOSET1 = 1 << 21;
else if(result == 6)
IOSET1 = 1 << 22;
else if(result == 7)
IOSET1 = 1 << 23;
		
 } 


 }
 

I think you are right , the ADC converts from MST to LSB so when you stop the conversion after 4 clocks then the LSB have not been converted yet so only the three MSB are valid and the seven LSB are garbage.
 

Yes it is working. If we assume that result bits are arranged upper=MSB, and lower=LSB than the result data from debbuger are matching with code.

In the code i posted before, there is only two line of code that need to be changed.
Code:
value=AD0DR1&0x0000E000;				
result=value>>13;

First line is mask bits on position 15,14,13 for 3bit AD conversion.
Second line is shifting these 3 bit on position 0,1,2 in new variable.

Thanks again for helping me :)
 

You are welcome, I haven't used the reduced bit setting before so I assumed that the results would be the LSB side but when you asked me again I searched and I found out it was the MSB side and it makes sense too.
 

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