UPF and CPF are the two power-formats being used in the industry for specifying power-intent
(or power-intention) of an IP or SoC which talks about multiple power-domains and island and corresponding strategies (Isolation,Level-shifteting,retention).
The power-formats includes description of various (specific) Lowpower cells to be used corresponding
to the strategies defined. These cells are not specified in the RTL but inserted in the netlist.
Does this means that Compiler which reads library and RTL and generates a Gate-level Netlist
understand both UPF and CPF standards.
If YES, than this means if one IP having power-intent written in UPF and another IP having power-intent written in CPF gets converted to Gate-level Netlist.
or Compiler though support both formats but able to work or take one power-format (i.e. either UPF
or CPF).
Please put your thoughts on this?
Now if IP1 with CPF -> netlist1 and IP2 with UPF -> netlist2 gets used for another design where IP1
IP2 are instantiated than
Can EDAtools able to run static lowpower checking over the design?