I don't know the full details how this works, here are my thoughts...
It appears to be based around a Pierce CMOS inverter with the ability to control the gain. You need higher gain to get started at switch-on and just enough gain to sustain oscillations after that. My guess is that the low voltage, low freq, small FB-caps and AGC is responsible for the low current consumption.
Also in a normal pierce arrangement you need an additional series resistor in the phase-shift feedback loop, but with a single CMOS inverter the output resistance can be used to substitute this. This will be the obvious thing to do here since you can't afford any level drops in your feedback at this low operating voltage and output swing. The output buffer, another inverter will square the signal and provide rail-to-rail signal swing .
Then also, I might be completely wrong...?