any method to design a low offset CMOS amplifer?
Without the auto-zero and chopper, besides the large size of the transistors, any other way to realize low offset?
In one paper I'm obtained simple formula which works quite well.
In general, the input pair should work in moderate inversion region to obtain high gm, while current mirror be deep in saturation to minimize current mismatch.
In addition degeneration of current sources could help if technology provides high current gain factor for fets.
Other methods is to use calibration or autozeroing methods.