Loopgain analysis of voltage doubler operated as regulator w/bang-bang feedback

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celebrevida

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I am designing the following circuit:


The voltage doubler is just the standard crossed couple voltage doubler.
The oscillator is just a ring oscillator with a NAND-gate to provide enable functionality.
I used a behavioral model for the schmitt trigger comparator.

I am able to get it to work in LTSpice and it seems to work fine.

However, how do I perform loopgain analysis to determine stability (phase margin) of this closed-loop system?

Unlike, say, an LDO regulator where you can break the loop and perform AC/LSTB analysis directly, I don't think you can do that with the bang-bang type feedback control.

So how do I approach this?

Thanks for any help!
 

Bang-bang (hysteresis) control loops tend to be inherently stable, so I'm not use what a loop analysis will tell you.

How does the hysteresis switch control the oscillator to vary the output voltage?
 

Bang-bang (hysteresis) control loops tend to be inherently stable, so I'm not use what a loop analysis will tell you.

How does the hysteresis switch control the oscillator to vary the output voltage?

The voltage doubler uses charge pump action to drive the Vo from Vdd to 2*Vdd. The pumping action is driven by the oscillator. When the oscillator stops running, Vo will slowly fall due to the Rload. To regulate Vo, we use the bang-bang feedback to turn the oscillator ON when below Vref and OFF when above Vref (including hysteresis).

As for bang-bang control loops being inherently stable, can elaborate or point me to papers on this?

Thanks.
 

As for bang-bang control loops being inherently stable, can elaborate or point me to papers on this?
Don't know of any but, since there is no inductance in the loop, there is nothing to sufficiently shift the phase of the feedback to make it unstable.
 


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