for low voltage low power buffer,,you may use LVDS, but i think it will not work well below supply 2 volts,,so,,if power not a big constraint for your design,,you may use CML buffers,,,very high speed and swing approx. 0.8 peak to peak,,,and can work approriatly for supply 1.2 volts, but take care so that no transistors gonna triode,,,,,,
regards
for low voltage low power buffer,,you may use LVDS, but i think it will not work well below supply 2 volts,,so,,if power not a big constraint for your design,,you may use CML buffers,,,very high speed and swing approx. 0.8 peak to peak,,,and can work approriatly for supply 1.2 volts, but take care so that no transistors gonna triode,,,,,,
regards
Are u saying that, at 1.2V power supply, when the swing is 800mVpp that is during the transient analysis, both the NMOS input pair shouldn't be in triode and be in saturation always? As far i know, when the switching takes effect for any buffers, it may go to triode and on and off consequenty when large output swing from buffer is needed. Correct me if im wrong. Thanks
for low voltage low power buffer,,you may use LVDS, but i think it will not work well below supply 2 volts,,so,,if power not a big constraint for your design,,you may use CML buffers,,,very high speed and swing approx. 0.8 peak to peak,,,and can work approriatly for supply 1.2 volts, but take care so that no transistors gonna triode,,,,,,
regards
Are u saying that, at 1.2V power supply, when the swing is 800mVpp that is during the transient analysis, both the NMOS input pair shouldn't be in triode and be in saturation always? As far i know, when the switching takes effect for any buffers, it may go to triode and on and off consequenty when large output swing from buffer is needed. Correct me if im wrong. Thanks
you r right,,,concerning the diff pair mos,in cml ,it do what is called current steering ,where the current full switch from one branch to the other,as input changed,so the one of the diff pair mos, goes off and other on ,,but the mos transisitor used in current tail biasing,,must be in saturation always,and his transisitor i meant in the previous msg,,,
for low voltage low power buffer,,you may use LVDS, but i think it will not work well below supply 2 volts,,so,,if power not a big constraint for your design,,you may use CML buffers,,,very high speed and swing approx. 0.8 peak to peak,,,and can work approriatly for supply 1.2 volts, but take care so that no transistors gonna triode,,,,,,
regards
Are u saying that, at 1.2V power supply, when the swing is 800mVpp that is during the transient analysis, both the NMOS input pair shouldn't be in triode and be in saturation always? As far i know, when the switching takes effect for any buffers, it may go to triode and on and off consequenty when large output swing from buffer is needed. Correct me if im wrong. Thanks
you r right,,,concerning the diff pair mos,in cml ,it do what is called current steering ,where the current full switch from one branch to the other,as input changed,so the one of the diff pair mos, goes off and other on ,,but the mos transisitor used in current tail biasing,,must be in saturation always,and his transisitor i meant in the previous msg,,,