Looking for SDRAM Controller Verilog code

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ashishjindal76

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SDRAM Controller

Hi

Does anybody around here has complete working code for sdram controller in verilog which is in synthesisable. the code which i have is ok but gives the problem when applied the constraints in VirtexII FPGA.

thanks

Ashish
 

SDRAM Controller

look www.xess.com

I use their VHDL SDRAM controller with Xilinx SpartanII-50 FPGA...
 

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