Looking for references about power management by voltage island technique

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kiran-gupta

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hello,

I have taken my phd research as power managegemt by voltage island technique but finding lost. Can anyone suggest how can I proceed with my research project.

agarwal k
 

Re: low power research

Could you please explain at which level (analog or digital) you will study this issue ?
 
Re: low power research

AdvaRes said:
Could you please explain at which level (analog or digital) you will study this issue ?
Click to expand...

I want to study the issues at circuit level (analog design).
 

Re: low power research

Ok I think that you have to study:
- Multi VDD Ilands SoCs
- Power monitoring
- Power gating
 

Re: low power research

AdvaRes said:
Ok I think that you have to study:
- Multi VDD Ilands SoCs
- Power monitoring
- Power gating
Click to expand...

Thanku sir. I have briefly done literature survey on all above topics and understood the concepts also. But I am stuck with how can I proceed with my project work. Should I work through front-end HDl programming by creating an ASIc and then proceed with making voltage Islands.
 

Re: low power research

You should do both HDL programing and Analog. For tools you can use Design compiler and Cadence ADE.
 

Re: low power research

AdvaRes said:
You should do both HDL programing and Analog. For tools you can use Design compiler and Cadence ADE.
Click to expand...

Can u suggest the type of project I should chose for this case. Can it be any ASIC approaximation. Any refrences , study material or web links.
 

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