yodathegreat
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Hi All,
I'm looking for a division (integer) in VHDL,
but in many cycle. (pipilned)
Because my division in one cycle is very very exprensive on my FPGA.
Normally is the shift and substract method.
best regards
I'm looking for a division (integer) in VHDL,
but in many cycle. (pipilned)
Because my division in one cycle is very very exprensive on my FPGA.
Normally is the shift and substract method.
best regards