logarithm unit implementaton

Hi
I want to implement floating point logarithmic unit
It is for double precision.

I have gone through following discussion on this forum.
https://www.edaboard.com/threads/270927/
https://www.edaboard.com/threads/267242/

so i think we can go for either LUT based or some taylor series method. or any other method..?

log(num) = exp * log(2) + log(man)
in above equation i think main issue is to calculate log(man) term.

in LUT based method as we can not go for larger size LUT we can have accuracy of 8 to 10 bits precision
same in taylor series expansion method we can go for 5 to 6 terms of expansion then result will be accurate upto 8 to 10 bits


means results are precise upto 8 to 10 bits of mantissa
am i right ..?
is it fine for double precision results ..?

if you have any suggestion please give.

thank you

10 bit precission sounds really poor for double precision, but I don't know your specification.

I assume that a hybrid strcucture, e.g. LUT with linear interpolation gives best resource utilization.

FvM said:

I assume that a hybrid strcucture, e.g. LUT with linear interpolation gives best resource utilization.

Click to expand...

Precisely this.

Thanks Fvm
Thanks mrflibble

yes it is very useful to increase accuracy with best resource utilization.
I have gone through this paper for Log implementation with interpolation and LUT method
**broken link removed**

this paper also mention accuracy up to 17 bits

actually I am mainly focusing on accuracy and as you said 10 to 17 bits are poor for double precision, what other i can do ?
can you suggest me some links?

by the time i have gone through xilinx log implementation. For that accuracy is nearly 53 bits for double precision with around 60 stage and freq is 350 MHz
but they don't provide what algo or method they are using.

thanks

hiii everyone
can anyone please guide me further ...?

Thanks

What are your requirements? They show a little over 20-bits accuracy for a 512 entry LUT with least squares interpolation. That's a 11264 bit table size, which still is doable.

As for Xilinx' log implementation, I don't know what they use, but you could try and take a look at the synthesis results for some very rough inspiration. Or maybe they mention it in the docs, who knows. Or or or ... you can always ask on the xilinx forum for some more info. If the question is generic enough, they might provide info.

thanks

mrflibble said:

What are your requirements?

Click to expand...

I want to do it for double precision and my main focus is on accuracy. so my requirement is at least 50 bits accuracy at output. So for that table size will be very large. isnt it ? what can i do for it then ?

mrflibble said:

As for Xilinx' log implementation, I don't know what they use, but you could try and take a look at the synthesis results for some very rough inspiration. Or maybe they mention it in the docs, who knows. Or or or ... you can always ask on the xilinx forum for some more info. If the question is generic enough, they might provide info.

Click to expand...

i will check for synthesis result and ask on xilinx forum thanks for suggestion.

- - - Updated - - -

Hi mrflibble

as xilinx core gives verilog file which is only for simulation i can not synthesize it.

thanks