[SOLVED] Load at .lib file for RTL COMPILER

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graphene

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I want to set a default output pin capacitance that my RTL compiler would follow.

Instead of manually definign the load thru sdc files is it ok if i simply change the set_output_max_capaicantce to my desired load ??
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such a deifnition is done in the library file... should the characterization be performed after such a load definition. ?? or delaring such load is as simple as a dummy argument assigned to the RTL compiler...
 

the max_capacitance in the .lib means that you should not have more load than specified else the cell will not function. most of the standard cells will work at any load but with bad performance. For reasonable performance you should keep within the load.

if you want constraint the design you can always set a higher max_cap constraints on the pin you want but you cant relax them. This can done at the synthessis level so that it remains part of the system all through place and route, Primetime runs.
 
i was giving this a second thought - ca this constraint also be modeled in the SDC file using "set_load" construct in the SDC and apply it to desired pins.
 
Just to complete the artmalik response, the Mac capacitance inside the liberty is to indicate also the timing table range inside this liberty, that means the timing table do not provide value outside this range and the extrapolated value could be far what the reality is, and this is why the max cap violation need to be analyze carefully.
 
thank you artmalik, englishdogg and rca ... i got it cleared now... i earlier thought that setting max load cap is something that determines the evaluation but now with rca's answer am even clearer.. thanks for your wonderful support guys !!!
 

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